H5GQ2H24AFR-R0C datasheet(19/172 Pages) HYNIX

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H5GQ2H24AFR-R0C Datasheet(PDF) 19 Page - Hynix Semiconductor

Part #	H5GQ2H24AFR-R0C

Description	2Gb (64Mx32) GDDR5 SGRAM

PDF	172 Pages

Scroll/Zoom	100%

Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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19 / 172 page

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsability for use of circuits described. No patent licenses are implied.

Rev. 1.2 /Nov. 2011

H5GQ2H24AFR

Note.1 : Parameters tRTPS and tRTPL apply only when READ and PRECHARGE go to the same bank; use tRTPS when BG are

disabled, and tRTPL when BG are enabled.

Table 8 Command Sequences Affected by Bank Groups

Command Sequence

Corresponding AC Timing Parameter

Notes

Bank Groups

Disabled

Bank Groups Enabled

Accesses to different bank

groups

Accesses within the same

bank group

ACTIVE to ACTIVE

tRRDS

tRRDL

WRITE to WRITE

tCCDS

tCCDL

READ to READ

tCCDS

tCCDL

Internal WRITE to READ

tWTRS

tWTRL

READ to PRECHARGE

tRTPS

1 tck

tRTPL

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