DSPIC33EP128GS708 datasheet(346/484 Pages) MICROCHIP

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dsPIC33EPXXXGS70X/80X FAMILY

DS70005258C-page 346

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25.1

Module Description

The Programmable Gain Amplifiers are used to amplify

small voltages (i.e., voltages across burden/shunt

resistors) to improve the signal-to-noise ratio of the

measured signal. The PGAx output voltage can be

read by any of the four dedicated Sample-and-Hold

circuits on the ADC module. The output voltage can

also be fed to the comparator module for overcurrent/

voltage protection. Figure 25-2 shows a functional

block diagram of the PGAx module. Refer to

Section 22.0 “High-Speed, 12-Bit Analog-to-Digital

Converter (ADC)” and Section 24.0 “High-Speed

Analog Comparator” for more interconnection details.

The gain of the PGAx module is selectable via the

GAIN<2:0> bits in the PGAxCON register. There are

five selectable gains, ranging from 4x to 64x. The

SELPI<2:0> and SELNI<2:0> bits in the PGAxCON

the PGAx module. For single-ended applications, the

SELNI<2:0> bits will select the ground as the negative

input source. To provide an independent ground

reference, the PGAxN2 and PGAxN3 pins are available

as the negative input source to the PGAx module.

The output voltage of the PGAx module can be

connected to the DACOUTx pin by setting the

PGAOEN bit in the PGAxCON register. When the

PGAOEN bit is enabled, the output voltage of PGA1 is

connected to DACOUT1 and PGA2 is connected to

DACOUT2. For devices with a single DACOUTx pin,

the output voltage of PGA2 can be connected to

DACOUT1 by configuring the DBCC Configuration bit

in the FDEVOPT register (FDEVOPT<6>).

If both the DACx output voltage and PGAx output volt-

age are connected to the DACOUTx pin, the resulting

output voltage would be a combination of signals.

There is no assigned priority between the PGAx

module and the DACx module.

FIGURE 25-2:

PGAx FUNCTIONAL BLOCK DIAGRAM

Note 1: Not all PGA positive/negative inputs are

available on all devices. Refer to the

specific device pinout for available input

source pins.

–

PGAxP1(1)

PGAxP2(1)

PGAxP3(1)

PGAxP4(1)

SELPI<2:0>

SELNI<2:0>

GND

PGAxN2(1)

PGAxN3(1,3)

GND

ADC

S&H

PGAxCON(1)

PGAxCAL(1)

PGAEN GAIN<2:0>

PGACAL<5:0>

–

DACx

CxCHS<1:0>

(ADCON4H)

INSEL<1:0>

(CMPCONx)

To DACOUTx Pin(2)

PGAx(1)

Note 1: x = 1 and 2.

2: The DACOUT2 device pin is only available on 64-pin devices.

3: The PGAxN3 input is not available on 28-pin devices.

PGAOEN

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