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DSPIC33EP128GS708 Datasheet(PDF) 348 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 348 Page - Microchip Technology |
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348 / 484 page ![]() dsPIC33EPXXXGS70X/80X FAMILY DS70005258C-page 348 2016-2018 Microchip Technology Inc. bit 2-0 GAIN<2:0>: PGAx Gain Selection bits 111 = Reserved 110 = Gain of 64x 101 = Gain of 32x 100 = Gain of 16x 011 = Gain of 8x 010 = Gain of 4x 001 = Reserved 000 = Reserved REGISTER 25-1: PGAxCON: PGAx CONTROL REGISTER (CONTINUED) REGISTER 25-2: PGAxCAL: PGAx CALIBRATION REGISTER U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — — PGACAL<5:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-6 Unimplemented: Read as ‘0’ bit 5-0 PGACAL<5:0>: PGAx Offset Calibration bits The calibration values for PGA1 and PGA2 must be copied from Flash addresses, 0x800E48 and 0x800E4C, respectively, into these bits before the module is enabled. Refer to the calibration data address table (Table 27-3) in Section 27.0 “Special Features” for more information. |
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