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DSPIC33EP128GS708 Datasheet(PDF) 387 Page - Microchip Technology

Part # DSPIC33EP128GS708
Description  16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators
PDF  484 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33EP128GS708 Datasheet(HTML) 387 Page - Microchip Technology

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 2016-2018 Microchip Technology Inc.
DS70005258C-page 387
dsPIC33EPXXXGS70X/80X FAMILY
IIL
Input Leakage Current(2,3)
DI50
I/O Pins 5V Tolerant(4)
-1
—
+1
AVSS  VPIN  VDD,
pin at high-impedance
DI51
I/O Pins Not 5V Tolerant(4)
-1
—
+1
AVSS  VPIN  VDD,
pin at high-impedance,
-40°C
 TA  +85°C
DI51a
I/O Pins Not 5V Tolerant(4)
-1
—
+1
A
Analog pins shared with
external reference pins,
-40°C
 TA  +85°C
DI51b
I/O Pins Not 5V Tolerant(4)
-1
—
+1
AVSS  VPIN  VDD,
pin at high-impedance,
-40°C
 TA  +125°C
DI51c
I/O Pins Not 5V Tolerant(4)
-1
—
+1
A
Analog pins shared with
external reference pins,
-40°C
 TA  +125°C
DI55
MCLR
-5
—
+5
AVSS VPIN VDD
DI56
OSC1
-5
—
+5
AVSS VPIN VDD,
XT and HS modes
TABLE 30-11: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS (CONTINUED)
DC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
-40°C
 TA  +85°C for Industrial
-40°C
 TA  +125°C for Extended
Param
No.
Symbol
Characteristic
Min.
Typ.(1)
Max.
Units
Conditions
Note 1:
Data in “Typ.” column is at 3.3V, +25°C unless otherwise stated.
2:
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current can be measured at different input
voltages.
3:
Negative current is defined as current sourced by the pin.
4:
See the “Pin Diagrams” section for the 5V tolerant I/O pins.
5:
VIL Source < (VSS – 0.3). Characterized but not tested.
6:
VIH Source > (VDD + 0.3) for pins that are not 5V tolerant only.
7:
Digital 5V tolerant pins do not have internal high-side diodes to VDD and cannot tolerate any “positive”
input injection current.
8:
| Injection Currents | > 0 can affect the ADC results by approximately 4-6 counts.
9:
Any number and/or combination of I/O pins not excluded under IICL or IICH conditions are permitted
provided the mathematical “absolute instantaneous” sum of the input injection currents from all pins do not
exceed the specified limit. Characterized but not tested.



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