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DS20006554A Datasheet(PDF) 28 Page - Microchip Technology |
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DS20006554A Datasheet(HTML) 28 Page - Microchip Technology |
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28 / 94 page ![]() ZL30260-ZL30263 Data Sheet 28 © 2021 Microchip Technology Inc. DS20006554A 5.9 Reset Logic The device has three reset controls: the RSTN pin, and the hard reset (HRST) and soft reset (SRST) bits in MCR1. The RSTN pin asynchronously resets the entire device. When the RSTN pin is low all internal registers are reset to their default values. When RSTN returns high t he device’s auto-configuration boot controller is started. The RSTN pin must be asserted once after power-up. Reset should be asserted for at least 1µs. See section 5.9.1 below for important details about using an external RC reset circuit with the RSTN pin. Asserting the MCR1.HRST (hard reset) bit is functionally similar to asserting the RSTN pin. The HRST bit resets the entire device except for the microprocessor interface, the HRST bit itself, the I2CA register, and CFGSR.IF[1:0]. While HRST=1 the device accepts register writes so that HRST can be set back to 0, but register reads are not allowed. When HRST is set back to 0, the TEST and AC[2:0] pins are sampled as described in section 5.2, but, unlike when RSTN is deasserted, the IF[1:0] pins are not sampled so that the device remains in the same interface mode (SPI or I2C) and maintains the same slave address when in I2C mode. When HRST is set back to 0, the device’s auto-configuration boot controller is started after a 1 to 3 s delay. The MCR1.SRST (soft reset) bit resets the entire device except for the microprocessor interface, the SRST bit itself, the MCR1.HRST bit, the I2CA register, and the CFGSR register. W hen the SRST bit is asserted the device’s auto- configuration boot controller is not started. Microchip recommends holding RSTN low while the internal ring oscillator starts up and stabilizes. An incorrect reset condition could result if RSTN is released before the oscillator has started up completely. Important: System software must wait at least 100µs after RSTN is deasserted and wait for GLOBISR.BCDONE=1 before configuring the device. 5.9.1 Design Considerations for Using an External RC Reset Circuit When the power supply arrangement for the device has VDDH=VDDL (3.3V or 2.5V) an external RC reset circuit can be used to reset the device during power-up with no additional considerations. When the power supply arrangement for the device has VDDL=1.8V then the board designer should choose one of two options: (a) a power-on-reset (POR) chip such as a Texas Instruments TPS3839 should be used instead of an external RC reset circuit, or (b) the device’s VDDIO pin must be wired to VDDL. In option (a) during the interval between VDDH ramping and VDDL ramping the RSTN pin can briefly behave as an output driving high. Therefore a current-limiting series resistor should be used between the POR chip and the device RSTN pin. The possible disadvantage of option (b) is that VDDIO, the power supply for all SPI/I2C pins and all GPIO pins, could be too low if neighboring devices operate at power supply voltages higher than VDDL. One exception to this disadvantage would be the I2C interface. Since I2C’s logic-high voltage is set by pull-up resistors, those resistors can be externally wired to a voltage higher than VDDIO up to 3.3V. The SCL/SCLK and SDA/MOSI pins are 3.3V tolerant. 5.10 Power-Supply Considerations Due to the multi-power-supply nature of the device, some I/Os have parasitic diodes between a lower-voltage supply and a higher-voltage supply. When ramping power supplies up or down, care must be taken to avoid forward-biasing these diodes because it could cause latchup. Two methods are available to prevent this. The first method is to place a Schottky diode external to the device between the lower-voltage supply and the higher-voltage supply to force the higher-voltage supply to be within one parasitic diode drop of the lower-voltage supply. The second method is to ramp up the higher-voltage supply first and then ramp up the lower-voltge supply. Important Note: The voltages on VDDL, VDDIO, and all VDDOx pins must not exceed VDDH. Not complying with this requirement may damage the device. 5.11 Auto-Configuration from EEPROM or ROM For ZL30260 and ZL30262, the device optionally can configure itself at reset from an internal ROM. The ROM stores eight configurations, known as configurations 0 through 7. As described in section 5.2.1, IF[1:0] must be 00, 01 or 10 at reset, and the device configuration to be used is specified by the values of the AC[2:0] pins at reset (0 through 7). Descriptions of the standard-product ROM configurations are available from Microchip. |
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