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DS20006554A Datasheet(PDF) 36 Page - Microchip Technology

Part # DS20006554A
Description  1-APLL, 6- or 10-Output Any-to-Any Clock Multiplier and Frequency Synthesizer
PDF  94 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DS20006554A Datasheet(HTML) 36 Page - Microchip Technology

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ZL30260-ZL30263
Data Sheet
36
© 2021 Microchip Technology Inc.
DS20006554A
Register Name:
MCR2
Register Description:
Master Configuration Register 2
Register Address:
02h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
XAMCK
IC3MCK
IC2MCK
IC1MCK
—
DBL
XAB[1:0]
Default
0
0
0
0
0
0
0
0
Bit 7: XA Monitor Clock (XAMCK). Leave this bit set to 0.
Bit 6: IC3 Monitor Clock (IC3MCK). Leave this bit set to 0.
Bit 5: IC2 Monitor Clock (IC2MCK). Leave this bit set to 0.
Bit 4: IC1 Monitor Clock (IC1MCK). Leave this bit set to 0.
Bit 2: Clock Doubler Enable (DBL). This bit enables the clock doubler for either the output of the crystal driver
circuitry or the signal on the XA pin. During power-up, system software must wait at least 5ms for the crystal driver
circuit to stabilize before enabling the clock doubler. See section 5.3.3.
0 = Disable (power down)
1 = Enable
Bits 1 to 0: XA/XB Pin Mode (XAB[1:0]). This field specifies the behavior of the XA and XB pins. See section 5.3.
00 = Crystal driver and input disabled / powered down
01 = Crystal driver and input enabled on XA/XB
10 = XA enabled as single-ended input for external oscillator signal; XB must be left floating
11 = {unused value}



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