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DS20006554A Datasheet(PDF) 85 Page - Microchip Technology |
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DS20006554A Datasheet(HTML) 85 Page - Microchip Technology |
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85 / 94 page ![]() ZL30260-ZL30263 Data Sheet 85 © 2021 Microchip Technology Inc. DS20006554A Table 20 - Electrical Characteristics: SPI Slave Interface Timing, Internal EEPROM (ZL30261 and ZL30263 Only) VDDIO = 3.3V±5% or 2.5V±5% or 1.8V±5% Characteristics (Notes 1 to 4) Symb VDDIO 3.3V VDDIO 2.5V VDDIO 1.8V Units Min Max Min Max Min Max SCLK frequency fBUS 7.7 4.5 4 MHz SCLK cycle time tCYC 130 220 240 ns CSN setup to first SCLK edge tSUC 50 100 100 ns CSN hold time after last SCLK edge tHDC 53 103 105 ns CSN high time tCSH 50 100 100 ns SCLK high time tCLKH 40 80 80 ns SCLK low time tCLKL 63 107 120 ns MOSI data setup time tSUI 11 21 25 ns MOSI data hold time tHDI 11 21 25 ns MISO enable time from SCLK edge tEN 0 0 0 ns MISO disable time from CSN high tDIS 22 22 25 ns MISO data valid time tDV 63 107 119 ns MISO data hold time from SCLK edge tHDO 0 0 0 ns CSN, MOSI input rise time, fall time tR, tF 10 10 10 ns Note 1: This timing applies (a) when EESEL=1 and (b) in direct EEPROM write mode (see section 5.11.2). Note 2: All timing is specified with 100pF load on all SPI pins. Note 3: All parameters in this table are guaranteed by design or characterization. Note 4: See timing diagram in Figure 18. |
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