| Electronic Components Datasheet Search |
|
DS20006554A Datasheet(PDF) 47 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
DS20006554A Datasheet(HTML) 47 Page - Microchip Technology |
|
47 / 94 page ![]() ZL30260-ZL30263 Data Sheet 47 © 2021 Microchip Technology Inc. DS20006554A Register Name: APLLSR Register Description: APLL Status Register Register Address: 48h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name AIFLL AIFL AIFHL AIFH ALKL ALK — SELREF Default 0 0 0 0 0 0 0 0 Bit 7: APLL Input Frequency Low Latched Status (AIFLL). This latched status bit is set to 1 when the AIFL status bit is set. AIFLL is cleared when written with a 1. When AIFLL is set it can cause an interrupt request if the AIFLIE interrupt enable bit is set. Bit 6: APLL Input Frequency Low Status (AIFL). This real-time status bit indicates that the input frequency to the APLL is lower that expected. 0 = Input frequency ok 1 = Input frequency low Bit 5: APLL Input Frequency High Latched Status (AIFHL). This latched status bit is set to 1 when the AIFH status bit is set. AIFHL is cleared when written with a 1. When AIFHL is set it can cause an interrupt request if the AIFHIE interrupt enable bit is set. Bit 4: APLL Input Frequency High Status (AIFH). This real-time status bit indicates that the input frequency to the APLL is higher that expected. 0 = Input frequency ok 1 = Input frequency high Bit 3: APLL Lock Latched Status (ALKL). This latched status bit is set to 1 when the ALK status bit changes state (set or cleared). ALKL is cleared when written with a 1. When ALKL is set it can cause an interrupt request if the ALKIE interrupt enable bit is set. Bit 2: APLL Lock Status (ALK). This real-time status bit indicates the lock status of the APLL. See section 5.5. 0 = Not locked 1 = Locked Bit 0: Selected Reference (SELREF). This real-time status field indicates the APLL’s selected reference. See section 5.5.3. 0 = The input specified by ACR3.APLLMUX 1 = The input specified by ACR3.ALTMUX Register Name: P2SR Register Description: Path 2 Status Register Register Address: 49h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name — — — — — — — SELREF Default 0 0 0 0 0 0 0 0 Bit 0: Selected Reference (SELREF). This real-time status field indicates Path 2’s selected reference. See section 5.15. 0 = The input specified by P2CR3.MUX 1 = The input specified by P2CR3.ALTMUX |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |