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DS20006554A Datasheet(PDF) 84 Page - Microchip Technology |
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DS20006554A Datasheet(HTML) 84 Page - Microchip Technology |
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84 / 94 page ![]() ZL30260-ZL30263 Data Sheet 84 © 2021 Microchip Technology Inc. DS20006554A Table 19 - Electrical Characteristics: SPI Slave Interface Timing, Device Registers VDDIO = 3.3V±5% or 2.5V±5% or 1.8V±5% Characteristics (Notes 1 to 3) Symbol VDDIO 3.3V or 2.5V VDDIO 1.8V Units Notes Min. Typ. Max. Min. Typ. Max. SCLK frequency fBUS 23 15 MHz SCLK cycle time tCYC 43.5 66 ns CSN setup to first SCLK edge tSUC 10 10 ns CSN hold time after last SCLK edge tHDC 10 10 ns CSN high time tCSH 25 25 ns SCLK high time tCLKH 10 33 ns SCLK low time tCLKL 21.75 33 ns MOSI data setup time tSUI 2 10 ns MOSI data hold time tHDI 2 10 ns MISO enable time from SCLK edge tEN 0 0 ns MISO disable time from CSN high tDIS 80 80 ns MISO data valid time tDV 20.5 32 ns MISO data hold time from SCLK edge tHDO 0 0 ns CSN, MOSI input rise time, fall time tR, tF 10 10 ns Note 1: All timing is specified with 100pF load on all SPI pins. Note 2: All parameters in this table are guaranteed by design or characterization. Note 3: See timing diagram in Figure 18. Figure 18 - SPI Slave Interface Timing CSN SCLK tSUC tCYC tCLKL tCLKH tSUI tHDI MOSI MISO tEN tHDO tDV tHDC tDIS tCSH |
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