STC12LE5616AD datasheet(188/377 Pages) STC

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7.4.1 Timer 0 Programmable Clock-out on P1.0 and Demo Program(C and ASM)

Timer/Counter 0 Mode 2: 8-Bit Auto-Reload

SYSclk

control

C/T=0

C/T=1

T0 Pin

TR0

GATE

INT0

AUXR.7/T0x12=0

AUXR.7/T0x12=1

TL0

(8 Bits)

TH0

(8 Bits)

÷12

÷1

Interrupt

TF0

Toggle

T0CLKO

P1.0

CLKOUT0

STC12C5620AD is able to generate a programmable clock output on P1.0. When T0CLKO/

WAKE_CLKO.0 bit in WAKE_CLKO SFR is set, T0 timer overflow pulse will toggle P1.0 latch to

generate a 50% duty clock. The frequency of clock-out = T0 overflow rate/2.

If C/T(TMOD.2) = 0, Timer/Counter 0 is set for Timer operation (input from internal system clock), the

Frequency of clock-out is as following :

(SYSclk) / (256 – TH0) / 2,

when AUXR.7 / T0x12=1

(SYSclk / 12) / (256 – TH0) / 2 ,

when AUXR.7 / T0x12=0

If C/T (TMOD.2) = 1, Timer/Counter 0 is set for Conter operation (input from external P3.4/T0 pin), the

Frequency of clock-out is as following :

T0_Pin_CLK / (256-TH0) / 2

The following programs demostrate Program Clock Output on P1.0 pin when Timer 0 operates as 8-bit auto-

reload Timer/Counter.

1. C Program:

/*--------------------------------------------------------------------------------*/

/* --- STC MCU International Limited -----------------------------------*/

/* --- STC 1T Series Programmable Clock Output Demo -------------*/

/* If you want to use the program or the program referenced in the */

/* article, please specify in which data and procedures from STC */

/*-------------------------------------------------------------------------------*/

#include "reg51.h"

//-----------------------------------------------

/* define constants */

#define FOSC

18432000L

//#define MODE 1T

//Timer clock mode, comment this line is 12T mode, uncomment is 1T mode

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