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STC12LE5616AD Datasheet(PDF) 37 Page - STCmicro Technology Co,.Ltd |
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STC12LE5616AD Datasheet(HTML) 37 Page - STCmicro Technology Co,.Ltd |
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37 / 377 page  2.1.4.2 Timer 1 Programmable Clock-out on P1.1 STC12C5620AD is able to generate a programmable clock output on P1.1. When T1CLKO/WAKE_CLKO.1 bit in WAKE_CLKO SFR is set, T1 timer overflow pulse will toggle P1.1 latch to generate a 50% duty clock. The frequency of clock-out = T1 overflow rate/2. If C/T(TMOD.6) = 0, Timer/Counter 1 is set for Timer operation (input from internal system clock), the Frequency of clock-out is as following : (SYSclk) / (256 – TH1) / 2, when AUXR.6 / T0x12=1 or (SYSclk / 12) / (256 – TH1) / 2 , when AUXR.6 / T0x12=0 If C/T(TMOD.6) = 1, Timer/Counter 1 is set for Conter operation (input from external P3.5/T1 pin), the Frequency of clock-out is as following : T1_Pin_CLK / (256-TH1) / 2 Timer/Counter 1 Mode 2: 8-Bit Auto-Reload Interrupt SYSclk TF1 control C/T=0 C/T=1 T1 Pin TR1 GATE INT1 AUXR.6/T1x12=0 AUXR.6/T1x12=1 TL1 (8 Bits) TH1 (8 Bits) ÷12 ÷1 Toggle T1CLKO P1.1 CLKOUT1 37 |
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