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STC12LE5616AD Datasheet(PDF) 89 Page - STCmicro Technology Co,.Ltd

Part # STC12LE5616AD
Description  Enhanced 8051 Central Processing Unit ,1T per machine cycle, faster 8~12 times than the rate of a standard 8051.
PDF  377 Pages
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Manufacturer  STC [STCmicro Technology Co,.Ltd]
Direct Link  http://www.stcmicro.com/
Logo STC - STCmicro Technology Co,.Ltd

STC12LE5616AD Datasheet(HTML) 89 Page - STCmicro Technology Co,.Ltd

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ADD A,Rn
Bytes:
1
Cycles:
1
Encoding:
0 0 1 0
1 r r r
Operation:
ADD
(A)←(A) + (Rn)
←(A) + (Rn)
(A) + (Rn)
ADD A,direct
Bytes:
2
Cycles:
1
Encoding:
0 0 1 0
0 1 0 1
direct address
Operation:
ADD
(A)←(A) + (direct)
←(A) + (direct)
(A) + (direct)
ADD A,@Ri
Bytes:
1
Cycles:
1
Encoding:
0 0 1 0
0 1 1 i
Operation:
ADD
(A)←(A) + ((Ri))
←(A) + ((Ri))
(A) + ((Ri))
ADD A,#data
Bytes:
2
Cycles:
1
Encoding:
0 0 1 0
0 1 0 0
immediate data
Operation:
ADD
(A)←(A) + #data
←(A) + #data
(A) + #data
ADDC A,<src-byte>
Function:
Add with Carry
Description:
ADDC simultaneously adds the byte variable indicated, the Carry flag and the Accumulator,
leaving the result in the Accumulator. The carry and auxiliary-carry flags are set, respectively,
if there is a carry-out from bit 7 or bit 3, and cleared otherwise. When adding unsigned
integers, the carry flag indicates an overflow occured.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit 7 but not
out of bit 6; otherwise OV is cleared. When adding signed integers, OV indicates a negative
number produced as the sum of two positive operands or a positive sum from two negative
operands.
Four source operand addressing modes are allowed: register, direct, register-indirect, or
immediate.
Example:
The Accumulator holds 0C3H(11000011B) and register 0 holds 0AAH (10101010B) with the
Carry. The instruction,
ADDC A,R0
will leave 6EH (01101101B) in the Accumulator with the AC flag cleared and both the carry
flag and OV set to 1.
89



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