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STC12LE5616AD Datasheet(PDF) 90 Page - STCmicro Technology Co,.Ltd |
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STC12LE5616AD Datasheet(HTML) 90 Page - STCmicro Technology Co,.Ltd |
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90 / 377 page  ADDC A,Rn Bytes: 1 Cycles: 1 Encoding: 0 0 1 1 1 r r r Operation: ADDC (A)←(A) + (C) + (Rn) ←(A) + (C) + (Rn) (A) + (C) + (Rn) ADDC A,direct Bytes: 2 Cycles: 1 Encoding: 0 0 1 1 0 1 0 1 direct address Operation: ADDC (A)←(A) + (C) + (direct) ←(A) + (C) + (direct) (A) + (C) + (direct) ADDC A,@Ri Bytes: 1 Cycles: 1 Encoding: 0 0 1 1 0 1 1 i Operation: ADDC (A)←(A) + (C) + ((Ri)) ←(A) + (C) + ((Ri)) (A) + (C) + ((Ri)) ADDC A,#data Bytes: 2 Cycles: 1 Encoding: 0 0 1 1 0 1 0 0 immediate data Operation: ADDC (A)←(A) + (C) + #data ←(A) + (C) + #data (A) + (C) + #data AJMP addr 11 Function: Absolute Jump Description: AJMP transfers program execution to the indicated address, which is formed at run-time by concatenating the high-order five bits of the PC (after incrementing the PC twice), opcode bits 7-5, and the second byte of the instruction. The destination must therefore be within the same 2K block of program memory as the first byte of the instruction following AJMP. Example: The label “JMPADR” is at program memory location 0123H. The instruction, AJMP JMPADR is at location 0345H and will load the PC with 0123H. Bytes: 2 Cycles: 2 Encoding: a10 a9 a8 0 0 0 0 1 a7 a6 a5 a4 a3 a2 a1 a0 Operation: AJMP (PC)← (PC)+ 2 ← (PC)+ 2 (PC)+ 2 (PC 10-0)← page address ← page address page address 90 |
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