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STC12LE5616AD Datasheet(PDF) 91 Page - STCmicro Technology Co,.Ltd

Part # STC12LE5616AD
Description  Enhanced 8051 Central Processing Unit ,1T per machine cycle, faster 8~12 times than the rate of a standard 8051.
PDF  377 Pages
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Manufacturer  STC [STCmicro Technology Co,.Ltd]
Direct Link  http://www.stcmicro.com/
Logo STC - STCmicro Technology Co,.Ltd

STC12LE5616AD Datasheet(HTML) 91 Page - STCmicro Technology Co,.Ltd

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ANL <dest-byte> , <src-byte>
Function:
Logical-AND for byte variables
Description:
ANL performs the bitwise logical-AND operation between the variables indicated and stores
the results in the destination variable. No flags are affected.
The two operands allow six addressing mode combinations. When the destination is the
Accumulator, the source can use register, direct, register-indirect, or immediate addressing;
when the destination is a direct address, the source can be the Accumulator or immediate
data.
Note: When this instruction is used to modify an output port, the value used as the original
port data will be read from the output data latch not the input pins.
Example:
If the Accumulator holds 0C3H(11000011B) and register 0 holds 55H (01010101B) then the
instruction,
ANL A,R0
will leave 41H (01000001B) in the Accumulator.
When the destination is a directly addressed byte, this instruction will clear combinations of
bits in any RAM location or hardware register. The mask byte determining the pattern of bits
to be cleared would either be a constant contained in the instruction or a value computed in
the Accumulator at run-time. The instruction,
ANL Pl, #01110011B
will clear bits 7, 3, and 2 of output port 1.
ANL A,Rn
Bytes:
1
Cycles:
1
Encoding:
0 1 0 1
1 r r r
Operation:
ANL
(A)←(A)
←(A)
(A)
(Rn)
ANL A,direct
Bytes:
2
Cycles:
1
Encoding:
0 1 0 1
0 1 0 1
direct address
Operation:
ANL
(A)←(A)
←(A)
(A)
(direct)
ANL A,@Ri
Bytes:
1
Cycles:
1
Encoding:
0 1 0 1
0 1 1 i
Operation:
ANL
(A)←(A)
←(A)
(A)
((Ri))
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