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STC12LE5616AD Datasheet(PDF) 92 Page - STCmicro Technology Co,.Ltd

Part # STC12LE5616AD
Description  Enhanced 8051 Central Processing Unit ,1T per machine cycle, faster 8~12 times than the rate of a standard 8051.
PDF  377 Pages
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Manufacturer  STC [STCmicro Technology Co,.Ltd]
Direct Link  http://www.stcmicro.com/
Logo STC - STCmicro Technology Co,.Ltd

STC12LE5616AD Datasheet(HTML) 92 Page - STCmicro Technology Co,.Ltd

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ANL A,#data
Bytes:
2
Cycles:
1
Encoding:
0 1 0 1
0 1 0 0
immediate data
Operation:
ANL
(A)←(A)
←(A)
(A)
#data
ANL direct,A
Bytes:
2
Cycles:
1
Encoding:
0 1 0 1
0 0 1 0
direct address
Operation:
ANL
(direct)←(direct)
←(direct)
(direct)
(A)
ANL direct,#data
Bytes:
3
Cycles:
2
Encoding:
0 1 0 1
0 0 1 1
direct address
immediate data
Operation:
ANL
(direct)←(direct)
←(direct)
(direct)
#data
ANL
C , <src-bit>
Function:
Logical-AND for bit variables
Description:
If the Boolean value of the source bit is a logical 0 then clear the carry flag; otherwise
leave the carry flag in its current state. A slash (“ / ”) preceding the operand in the assembly
language indicates that the logical complement of the addressed bit is used as the source
value, but the source bit itself is not affceted. No other flsgs are affected.
Only direct addressing is allowed for the source operand.
Example:
Set the carry flag if, and only if, P1.0 = 1, ACC. 7 = 1, and OV = 0:
MOV C, P1.0
;LOAD CARRY WITH INPUT PIN STATE
ANL C, ACC.7
;AND CARRY WITH ACCUM. BIT.7
ANL C, /OV
;AND WITH INVERSE OF OVERFLOW FLAG
ANL C,bit
Bytes:
2
Cycles:
2
Encoding:
1 0 0 0
0 0 1 0
bit address
Operation:
ANL
(C) ← (C)
← (C)
(C)
(bit)
92



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