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S75WS256NDFBAWMB Datasheet(PDF) 105 Page - SPANSION

Part # S75WS256NDFBAWMB
Description  Stacked Multi-Chip Product (MCP)
PDF  216 Pages
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S75WS256NDFBAWMB Datasheet(HTML) 105 Page - SPANSION

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February 17, 2005 S75WS-N-00_00_A0
S75WS256Nxx Based MCPs
103
Data
Sheet
If the starting burst address is at address A1:0 = 01, 10, 11 then three, four or five wait states
are required, respectively, until data D4 is read and burst sequence becomes linear. Please refer
to Table 18.4 for further details. The RDY output indicates this condition to the system by
deasserting.
18.2.1
Continuous Burst
The device will continue to output sequential burst data, wrapping around to address 000000h
after it reaches the highest addressable memory location, until the system drives CE# high, RE-
SET# low, or AVD# low in conjunction with a new address. See Table 18.1.
18.2.2
8-, 16-, and 32-Word Linear Burst with Wrap Around
The remaining three modes are of the linear wrap around design, in which a fixed number of
words are read from consecutive addresses. In each of these modes, the burst addresses read
are determined by the group within which the starting address falls. The groups are sized accord-
ing to the number of words read in a single burst sequence for a given mode (see Table 18.5.).
As an example: if the starting address in the 8-word mode is 3ch, the address range to be read
would be 38-3Fh, and the burst sequence would be 3C, 3D, 3E, 3F, 38, 39, 3A, 3Bh. if wrap around
is enable. The burst sequence begins with the starting address written to the device, but wraps
back to the first address in the selected group and stops at the group size, terminating the burst
read. In a similar fashion, the 16-word and 32-word Linear Wrap modes begin their burst se-
quence on the starting address written to the device, and then wrap back to the first address in
the selected address group. Note that in these three burst read modes the address pointer
does not cross the boundary that occurs every 512 words; thus, no wait states are in-
serted (except during the initial access). (see Figure 25.4)
18.2.3
8-, 16-, and 32-Word Linear Burst without Wrap Around
If wrap around is not enabled, 8-word, 16-word, or 32-word burst will execute linearly up to word
boundary. The burst will stop after 8, 16, or 32 addresses and will not wrap around to the first
address of the selected group. As an example: if the starting address in the 8-word mode is 3ch,
the address range to be read would be 39-40h, and the burst sequence would be 3C, 3D-3E-3F-
40-41-42-43h if wrap around is not enabled. The next address to be read will require a new ad-
dress and AVD# pulse. The address range would stay within the address block, causing address
FFFFh to be followed by 0000h. Note that in this burst mode, the address pointer may cross the
boundary that occurs every 128 words.
18.3 Configuration Register
The device uses a configuration register to set the various burst parameters: number of wait
states, burst read mode, RDY configuration, and synchronous mode active.
18.4 RDY: Ready
The RDY is a dedicated output that, when the device is configured in the Synchronous mode, in-
dicates (when at logic low) the system should wait 1 clock cycle before expecting the next word
of data. The RDY pin is only controlled by CE#. Using the RDY Configuration Command Sequence,
RDY can be set so that a logic low indicates the system should wait 2 clock cycles before expecting
valid data.
Table 18.5 Burst Address Groups
Mode
Group Size
Group Address Ranges
8-word
8 words
0-7h, 8-Fh, 10-17h,...
16-word
16 words
0-Fh, 10-1Fh, 20-2Fh,...
32-word
32 words
00-1Fh, 20-3Fh, 40-5Fh,...



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