S75WS256NDFBAWMB datasheet(125/216 Pages) SPANSION

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February 17, 2005 S75WS-N-00_00_A0

S75WS256Nxx Based MCPs

123

Data

Sheet

During an Embedded Program or Erase algorithm operation, successive read cycles to any ad-

dress cause DQ6 to toggle. When the operation is complete, DQ6 stops toggling.

After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6

toggles for approximately tASP (All Sectors Protected toggle time), then returns to reading array

data. If not all selected sectors are protected, the Embedded Erase algorithm erases the unpro-

tected sectors, and ignores the selected sectors that are protected.

The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or

is erase-suspended. When the device is actively erasing (that is, the Embedded Erase algorithm

is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6 stops tog-

gling. However, the system must also use DQ2 to determine which sectors are erasing or erase-

suspended. Alternatively, the system can use DQ7 (see the subsection on DQ7: Data# Polling).

If a program address falls within a protected sector, DQ6 toggles for approximately tPSP after the

program command sequence is written, then returns to reading array data.

DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embed-

ded Program algorithm is complete.

See the following for additional information: Figure 22.6, Figure 25.14 (toggle bit timing dia-

gram), and Table 22.12.

Toggle Bit I on DQ6 requires either OE# or CE# to be deasserted and reasserted to show the

change in state.

Note: The system should recheck the toggle bit even if DQ5 = 1 because the toggle bit may stop toggling as DQ5 changes

to 1. See the subsections on DQ6 and DQ2 for more information.

Figure 22.6 Toggle Bit Algorithm

S75WS256NDFBAWMB Datasheet(PDF) 125 Page - SPANSION