TMP89FS60 datasheet(164/410 Pages) TOSHIBA

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Page 150

13. 16-bit Timer Counter (TCA)

13.4 Timer Function

TMP89FS60

RA001

Figure 13-2 Timer Mode Timing Chart

Source clock

Counter

Timer start

Write to TA0DRAL

Write to TA0DRAH

TA0DRAL

Match detection

Write n

Write s

Write m

Write r

Reflected by writing to TA0DRAH

Reflected by

an interrupt

Reflected at the same time as data

is written into TA0DRAH while

the timer is stopped

Counter clear

INTTCA interrupt request

234

mn-1

TA0DRAH

TA0CR<TA0S>

Timer stop

Match detection

Counter clear

rs-1

TA0MOD<TA0DBE>

When the double buffer is disabled (TA0MOD<TA0DBE>=”0”)

Source clock

Counter

Timer start

Write to TA0DRAL

Write to TA0DRAH

TA0DRAL

Match detection

Write n

Write s

Write m

Write r

Counter clear

INTTCA interrupt request

234

mn-1

TA0DRAH

TA0CR<TA0S>

Temporary buffer

(8 bits)

Temporary buffer

(8 bits)

Double buffer

(16 bits)

Match detection

Counter clear

mn-1

rs-1

TA0MOD<TA0DBE>

When the double buffer is enabled (TA0MOD<TA0DBE>=”1”)

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