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TMP89FS60 Datasheet(PDF) 166 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 166 Page - Toshiba Semiconductor |
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166 / 410 page ![]() Page 152 13. 16-bit Timer Counter (TCA) 13.4 Timer Function TMP89FS60 RA001 13.4.2 External trigger timer mode In the external trigger timer mode, the up counter starts counting when it is triggered by the input to the TCA0 pin. 13.4.2.1 Setting Setting the operation mode selection TA0MOD<TA0M> to "100" activates the external trigger timer mode. Select the source clock at TA0MOD<TA0CK>. Select the trigger edge at the trigger edge input selection TA0MOD<TA0TED>. Setting TA0MOD<TA0TED> to "0" selects the rising edge, and setting it to "1" selects the falling edge. Note that this mode uses the TA0 input pin, and the TCA0 pin must be set to the input mode beforehand in port settings. The operation is started by setting TA0CR<TA0S> to "1". After the timer is started, writing to TA0MOD and TA0CR<TA0OVE> is disabled. Be sure to complete the required mode settings before starting the timer. 13.4.2.2 Operation After the timer is started, when the selected trigger edge is input to the TCA0 pin, the up counter incre- ments according to the selected source clock. When a match between the up counter value and the value set to timer register A (TA0DRA) is detected, an INTTA0 interrupt request is generated and the up counter is cleared to "0000H". After being cleared, the up counter continues counting. When TA0MOD<TA0METT> is "1" and the edge opposite to the selected trigger edge is detected, the up counter stops counting and is cleared to "0000H". Subsequently, when the selected trigger edge is detected, the up counter restarts counting. In this mode, an interrupt request can be generated by detecting that the input pulse exceeds a certain pulse width. If TA0MOD<TA0METT> is "0", the detection of the selected edge and the opposite edge is ignored during the period from the detection of the specified trigger edge and the start of counting through until the match detection. Setting TA0CR<TA0S> to "0" during the timer operation causes the up counter to stop counting and be cleared to "0000H". 13.4.2.3 Auto capture Refer to "13.4.1.3 Auto capture". 13.4.2.4 Register buffer configuration Refer to "13.4.1.4 Register buffer configuration". |
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