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TMP89FS60 Datasheet(PDF) 170 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 170 Page - Toshiba Semiconductor

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Page 156
13. 16-bit Timer Counter (TCA)
13.4 Timer Function
TMP89FS60
RA001
13.4.4 Window mode
In the window mode, the up counter counts up at the rising edge of the pulse that is logical anded product of
the input pulse to the TCA0 pin (window pulse) and the internal clock.
13.4.4.1 Setting
Setting the operation mode selection TA0MOD<TA0M> to "101" activates the window mode. Select
the source clock at TA0MOD<TA0CK>.
Select the window pulse level at the trigger edge input selection TA0MOD<TA0TED>. Setting
TA0MOD<TA0TED> to "0" enables counting up as long as the window pulse is at the "H" level. Setting
TA0MOD<TA0TED> to "1" enables counting up as long as the window pulse is at the "L" level.
Note that this mode uses the TA0 input pin, and the TCA0 pin must be set to the input mode beforehand
in port settings.
The operation is started by setting TA0CR<TA0S> to "1". After the timer is started, writing to
TA0MOD and TA0CR<TA0OVE> is disabled. Be sure to complete the required mode settings before
starting the timer.
13.4.4.2 Operation
After the operation is started, when the level selected at TA0MOD<TA0TED> is input to the TCA0 pin,
the up counter increments according to the source clock selected at TA0MOD<TA0CK>. When a match
between the up counter value and the value set to timer register A (TA0DRA) is detected, an INTTA0
interrupt request is generated and the up counter is cleared to "0000H". After being cleared, the up counter
restarts counting.
The maximum frequency to be supplied must be slow enough for the program to analyze the count
value. Define a frequency pulse that is sufficiently lower than the programmed internal source clock.
Setting TA0CR<TA0S> to "0" during the timer operation causes the up counter to stop counting and be
cleared to "0000H".
13.4.4.3 Auto capture
Refer to "13.4.1.3 Auto capture".
13.4.4.4 Register buffer configuration
Refer to "13.4.1.4 Register buffer configuration".



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