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TMP89FS60 Datasheet(PDF) 173 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 173 Page - Toshiba Semiconductor |
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173 / 410 page ![]() Page 159 TMP89FS60 RA001 The captured value must be read from TA0DRB (and also from TA0DRA for the double-edge capture) before the next trigger edge is detected. If the captured value is not read, it becomes undefined. TA0DRA and TA0DRB must be read by using a 16-bit access instruction. Setting TA0CR<TA0S> to "0" during the timer operation causes the up counter to stop counting and be cleared to "0000H". Note 1: After the timer is started, if the edge opposite to the selected trigger edge is detected first, no capture is executed and no INTTA0 interrupt request occurs. In this case, the capture starts when the selected trigger edge is detected next. Figure 13-7 Pulse Width Measurement Mode Timing Chart Source clock Counter Counter clear Counter clear Counter clear Counter clear Timer start Count start Count start After the timer is started, if the falling edge is detected first, no interrupt occurs. 1 0 TA0DRBH, L INTTCA interrupt request 0 24 3 3 mn-1 mn 1 0 mn 20 TA0CR<TA0S> Timer stop TA0MOD<TA0TED> TA0 pin input Single-edge capture (TA0MOD<TAMCAP>=”0”) Source clock Counter Timer start After the timer is started, if the falling edge is detected first, no interrupt occurs. 1 0 TA0DRBH, L INTTCA interrupt request 0 24 3 mn-1 mn mn+1 st-1 st mn 0 012 0 TA0DRAH, L st TA0CR<TA0S> Timer stop TA0MOD<TA0TED> TA0 pin input Double-edge capture (TA0MOD<TAMCAP>=”1”) |
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