TMP89FS60 datasheet(172/410 Pages) TOSHIBA

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Page 158

13. 16-bit Timer Counter (TCA)

13.4 Timer Function

TMP89FS60

RA001

13.4.5 Pulse width measurement mode

In the pulse width measurement mode, the up counter starts counting at the rising/falling edge(s) of the input

to the TCA0 pin and measures the input pulse width based on the internal clock.

13.4.5.1 Setting

Setting the operation mode selection TA0MOD<TA0M> to "110" activates the pulse width measure-

ment mode. Select the source clock at TA0MOD<TA0CK>.

Select the trigger edge at the trigger edge input selection TA0MOD<TA0TED>. Setting

TA0MOD<TA0TED> to "0" selects the rising edge, and setting it to "1" selects the falling edge as a trig-

ger to start the capture.

The operation after capturing is determined by the pulse width measurement mode control

TA0MOD<TA0MCAP>. Setting TA0MOD<TA0MCAP> to "0" selects the double-edge capture. Setting

TA0MOD<TA0MCAP> to "1" selects the single-edge capture.

The operation to be executed in case of an overflow of the up counter can be selected at the overflow

interrupt control TA0CR<TA0OVE>. Setting TA0OVE to "1" makes an INTTA0 interrupt request occur

in case of an overflow. Setting TA0OVE to "0" makes no INTTA0 interrupt request occur in case of an

overflow.

Note that this mode uses the TA0 input pin, and the TCA0 pin must be set to the input mode beforehand

in port settings.

The operation is started by setting TA0CR<TA0S> to "1". After the timer is started, writing to

TA0MOD and TA0CR<TA0OVE> is disabled. Be sure to complete the required mode settings before

starting the timer.

13.4.5.2 Operation

After the timer is started, when the selected trigger edge (start edge) is input to the TCA0 pin, the up

counter increments according to the selected source clock. Subsequently, when the edge opposite to the

selected edge is detected, the up counter value is captured into TA0DRB, an INTTA0 interrupt request is

generated, and TA0SR<TA0CPFB> is set to "1". Depending on the TA0MOD<TA0MCAP> setting, the

operation differs as follows:

• Double-edge capture (When TA0MOD<TA0MCAP> is "0")

The up counter continues counting up after the edge opposite to the selected edge is detected.

Subsequently, when the selected trigger edge is input, the up counter value is captured into

TA0DRA, an INTTA0 interrupt request is generated, and TA0SR<TA0CPFA> is set to "1". At

this time, the up counter is cleared to "0000H".

• Single-edge capture (When TA0MOD<TA0MCAP> is "1")

The up counter stops counting up and is cleared to "0000H" when the edge opposite to the

selected edge is detected. Subsequently, when the start edge is input, the up counter restarts

increment.

When the up counter overflows during capturing, the overflow flag TA0SR<TA0OVF> is set to "1". At

this time, an INTTA0 interrupt request occurs if the overflow interrupt control TA0CR<TA0OVE> is set

to "1".

The

capture

completion

flags

(TA0SR<TA0CPFA,

TA0CPFB>

and

the

overflow

flag

(TA0SR<TA0OVF>) are cleared to "0" automatically when TA0SR is read.

TMP89FS60 Datasheet(PDF) 172 Page - Toshiba Semiconductor

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