TMP89FS60 datasheet(177/410 Pages) TOSHIBA

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Page 163

TMP89FS60

RA001

13.5 Noise Canceller

The digital noise canceller can be used in the operation modes that use the TCA0 pin.

13.5.1 Setting

When the digital noise canceller is used, the input level is sampled at the sampling intervals set at

TA0CR<TA0NC>. When the same level is detected three times consecutively, the level of the input to the

timer is changed.

Setting TA0CR<TA0NC> to any values than "00" allows the noise canceller to start operation, regardless of

the TA0CR<TA0S> value.

When the noise canceller is used, allow the timer to start after a period of time that is equal to four times the

sampling interval after TA0CR<TA0NC> is set has elapsed. This stabilizes the input signal.

Set TA0CR<TA0NC> while the timer is stopped (TA0CR<TA0S> = "0"). When TA0CR<TA0S> is "1",

writing is ignored.

In the SLOW 1/2 or SLEEP 1 mode, setting TA0CR<TA0NC> to "11" selects fs/2 as the source clock for the

operation. Setting TA0CR<TA0NC> to "00" disables the noise canceller. Setting TA0CR<TA0NC> to "01" or

"10" disables the TCA0 pin input.

Table 13-4 Noise Cancel Time ( fcgck = 8 [MHz] )

TA0NC

Sampling interval

Time removed as noise

Time regarded as signal

None

250 ns (2/fcgck)

750 ns or less

µs or more

500 ns (4/fcgck)

1.5

µs or less

µs or more

µs (256/fcgck)

µs or less

128

µs or more

TMP89FS60 Datasheet(PDF) 177 Page - Toshiba Semiconductor