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TMP89FS60 Datasheet(PDF) 235 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 235 Page - Toshiba Semiconductor

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Page 221
TMP89FS60
RA001
16.9 Data Sampling Method
The UART receive control circuit starts RT clock counting when it detects a falling edge of the input pulses to the
RXD0 pin. 15 to 17 RT clocks are counted per bit and each clock is expressed as RTn (n=16 to 0). In a bit that has 17
RT clocks, RT16 to RT0 are counted. In a bit that has 16 RT clocks, RT15 to RT0 are counted. In a bit that has 15 RT
clocks, RT14 to RT0 are counted (Decrement). During counting of RT8 to RT6, the UART receive control circuit
samples the input pulses to the RXD0 pin to make a majority decision. The same level detected twice or more from
among three samplings is processed as the data for the bit.
The number of RT clocks can be changed in a range of 15 to 17 by setting UART0CR2<RTSEL>. However, sam-
pling is always executed in RT8 to RT6, even if the number of RT clocks is changed (Figure 16-7).
Figure 16-7 Data Sampling in Each Case of UARTCR2<RTSEL>
RT15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0 15 14
Bit 0
Start Bit
Bit 0
Start Bit
(b) UARTCR2<RTSEL> is “001B”
RT clock
Internal received
data
RT15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
15 14 13
Bit 0
Start Bit
Bit 0
Start Bit
(a) UARTCR2<RTSEL> is “000B”
RT clock
RXD0 pin
RXD0 pin
RXD0 pin
RXD0 pin
RXD0 pin
Internal received
data
RT16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0 16
Bit 0
Start Bit
Bit 0
Start Bit
(e) UARTCR2<RTSEL> is “100B”
RT clock
Internal received
data
RT14 13 12 11 10 9
8
7
6
5
4
3
2
1
0 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
14 13 12 11
Bit 0
Start Bit
Bit 0
Start Bit
(d) UARTCR2<RTSEL> is “011B”
RT clock
Internal received
data
RT14 13 12 11 10 9
8
7
6
5
4
3
2
1
0 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0 14 13 12 11 10
Bit 0
Bit 1
Bit 1
Bit 1
Bit 1
Start Bit
Bit 0
Start Bit
(c) UARTCR2<RTSEL> is “010B”
RT clock
Internal received
data



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