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TMP89FS60 Datasheet(PDF) 257 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 257 Page - Toshiba Semiconductor

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Page 243
TMP89FS60
RA001
17.4 Functions
17.4.1 Transfer format
The transfer format can be set to either MSB or LSB first by using SIO0CR<SIODIR>. Setting
SIO0CR<SIODIR> to "0" selects LSB first as the transfer format. In this case, the serial data is transferred in
sequence from the least significant bit.
Setting SIO0CR<SIODIR> to "1" selects MSB first as the transfer format. In this case, the serial data is
transferred in sequence from the most significant bit.
17.4.2 Serial clock
The serial clock can be selected by using SIO0CR<SIOCKS>.
Setting SIO0CR<SIOCKS> to "000" to "110" selects the internal clock as the serial clock. In this case, the
serial clock is output from the SCLK0 pin. The serial data is transferred in synchronization with the edge of the
SCLK0 pin output.
Setting SIO0CR<SIOCKS> to "111" selects an external clock as the serial clock. In this case, an external
serial clock must be input to the SCLK0 pin. The serial data is transferred in synchronization with the edge of
the external clock.
The serial data transfer edge can be selected for both the external and internal clocks. For details, refer to
"17.4.3 Transfer edge selection".
17.4.3 Transfer edge selection
The serial data transfer edge can be selected by using SIOCR<SIOEDG>.
When SIOCR<SIOEDG> is "0", the data is transmitted in synchronization with the falling edge of the clock
and the data is received in synchronization with the rising edge of the clock.
When SIOCR<SIOEDG> is "1", the data is transmitted in synchronization with the rising edge of the clock
and the data is received in synchronization with the falling edge of the clock.
Table 17-3 Transfer Baud Rate
SIO0CR
<SIOCKS>
Serial clock [Hz]
fcgck=1MHz
fcgck=4MHz
fcgck=8MHz
fs=32.768kHz
NORMAL1/2 or
IDLE1/2 mode
SLOW1/2 or
SLEEP1 mode
1-bit time
(
µs)
Baud rate
(bps)
1-bit time
(
µs)
Baud rate
(bps)
1-bit time
(
µs)
Baud rate
(bps)
1-bit time
(
µs)
Baud rate
(bps)
000
fcgck/29
-
512
1.953k
128
7.813k
64
15.625k
-
-
001
fcgck/26
-
64
15.625k
16
62.5k
8
125k
-
-
010
fcgck/25
-
32
31.25k
8
125k
4
250k
-
-
011
fcgck/24
-
16
62.5k
4
250k
2
500k
-
-
100
fcgck/23
-
8
125k
2
500k
1
1M
-
-
101
fcgck/22
-
4
250k
1
1M
0.5
2M
-
-
110
fcgck/2
fs/23
2
500k
0.5
2M
0.25
4M
244
4k
Table 17-4 Transfer Edge Selection
SIO0CR<SIOEDG>
Data transmission
Data reception
0
Falling edge
Rising edge
1
Rising edge
Falling edge



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