TMP89FS60 datasheet(259/410 Pages) TOSHIBA

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Page 245

TMP89FS60

RA001

17.5 Transfer Modes

17.5.1 8-bit transmit mode

The 8-bit transmit mode is selected by setting SIO0CR<SIOM> to "01".

17.5.1.1 Setting

Before starting the transmit operation, select the transfer edges at SIO0CR<SIOEDG>, a transfer format

at SIO0CR<SIODIR> and a serial clock at SIO0CR<SIOCKS>. To use the internal clock as the serial

clock, select an appropriate serial clock at SIO0CR<SIOCKS>. To use an external clock as the serial

clock, set SIO0CR<SIOCKS> to "111".

The 8-bit transmit mode is selected by setting SIO0CR<SIOM> to "01".

The transmit operation is started by writing the first byte of transmit data to SIO0BUF and then setting

SIO0CR<SIOS> to "1".

Writing data to SIO0CR<SIOEDG, SIOCKS and SIODIR> is invalid when the serial communication is

in progress, or when SIO0SR<SIOF> is "1". Make these settings while the serial communication is

stopped. While the serial communication is in progress (SIO0SR<SIOF>="1"), only writing "00" to

SIO0CR<SIOM> or writing "0" to SIO0CR<SIOS> is valid.

17.5.1.2 Starting the transmit operation

The transmit operation is started by writing data to SIO0BUF and then setting SIO0CR<SIOS> to "1".

The transmit data is transferred from SIO0BUF to the shift register, and then transmitted as the serial data

from the SO0 pin according to the settings of SIO0CR<SIOEDG, SIOCKS and SIODIR>. The serial data

becomes undefined if the transmit operation is started without writing any transmit data to SIO0BUF.

In the internal clock operation, the serial clock of the selected baud rate is output from the SCLK0 pin.

In the external clock operation, an external clock must be supplied to the SCLK0 pin.

By setting SIO0CR<SIOS> to "1", SIO0SR<SIOF and SEF> are automatically set to "1" and an

INTSIO0 interrupt request is generated.

SIO0SR<SEF> is cleared to "0" when the 8th bit of the serial data is output.

17.5.1.3 Transmit buffer and shift operation

If data is written to SIO0BUF when the serial communication is in progress and the shift register is

empty, the written data is transferred to the shift register immediately. At this time, SIO0SR<TBFL>

remains at "0".

If data is written to SIO0BUF when some data remains in the shift register, SIO0SR<TBFL> is set to

"1". If new data is written to SIO0BUF in this state, the contents of SIO0BUF are overwritten by the new

value. Make sure that SIO0SR<TBFL> is "0" before writing data to SIO0BUF.

17.5.1.4 Operation on completion of transmission

The operation on completion of the data transmission varies depending on the operating clock and the

state of SIO0SR<TBFL>.

TMP89FS60 Datasheet(PDF) 259 Page - Toshiba Semiconductor