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R7F100LLL3CFB Datasheet(PDF) 121 Page - Renesas Technology Corp |
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R7F100LLL3CFB Datasheet(HTML) 121 Page - Renesas Technology Corp |
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121 / 148 page ![]() RL78/L23 2. Electrical Characteristics R01DS0502EJ0110 Rev.1.10 Page 121 of 145 Oct 31, 2025 2.6.4 Comparator characteristics Note The internal reference voltage can be selected as comparator reference voltage only when 1.8 V ≤ VDD ≤ 5.5 V. (TA = -40 to +105°C, 1.6 V ≤ VDD ≤ 5.5 V, VSS = EVSS = 0 V) Item Symbols Conditions Min. Typ. Max. Unit Input voltage range IVREF Input to the IVREF0 and IVREF1 pins C0LVL = 0, C1LVL = 0 0VDD -1.4 V Input to the IVREF0 and IVREF1 pins C0LVL = 1, C1LVL = 1 1.4 VDD V IVCMP Input to the IVCMP0 and IVCMP1 pins -0.3 VDD +0.3 V Output delay td VDD = 3.0 V, Input slew rate > 1 V/µs High-speed mode 1.5 µs Low-speed mode 3.0 µs Offset voltage VIOCMP High-speed mode 50 mV Low-speed mode 40 mV Operation stabilization wait time tCMP 30 µs Internal reference voltageNote VBGR2 Internal reference voltage 1.4 1.6 V VDA2 D/A converter output 2 + comparator offset voltage 1.8 V ≤ VDD ≤ 5.5 V VDD × (DACS2)/ 256 + VIOCMP V D/A converter channel 2 settling time tSET2 When changing the DACS2 settings 2.7 V ≤ VDD ≤ 5.5 3 µs 1.6 V ≤ VDD ≤ 5.5 V 6 µs |
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