AT89LP6440 datasheet(74/194 Pages) ATMEL

74 / 194 page

3706A–MICRO–9/09

AT89LP6440 - Preliminary

13.3

Output Compare Mode

The Compare/Capture Array provides a variety of compare modes suitable for event timing or

waveform generation. CCA channels are configured for compare mode by setting the CCMx bit

in the associated CCCx register to 1. A compare event occurs when the 16-bit contents of a

channel’s data register match the contents of Timer 2 (TH2 and TL2). The compare event also

sets the channel’s interrupt flag CCFx in T2CCF and may optionally clear Timer 2 to 0000H if the

CTCx bit in CCCx is set. A diagram of a CCA channel in compare mode is shown in Figure 13-3.

Figure 13-3. CCA Compare Mode Diagram

13.3.1

Waveform Generation

Each CCA channel has an associated external compare output pin: CCA (P2.0), CCB (P2.1),

CCC (P2.2) and CCD (P2.3). The CxM

2-0 bits in CCCx determine what action is taken when a

compare event occurs. The output pin may be set to 1, cleared to 0 or toggled. Output actions

take place even if the interrupt is disabled; however, the associated I/O pin must be set to the

desired output mode before the compare event occurs. The state of the compare outputs are ini-

tialized to 1 by reset. Channels C and D cannot use their output pin when the DAC is enabled.

These channels may still be used to generate interrupts or to clear the timebase. The same

applies to all four channels when Port 2 is used for the external memory interface.

Multiple compare events per channel can occur within a single time period, provided that the

software has time to update the compare value before the timer reaches the next compare point.

In this case other interrupts should be disabled or the CCA interrupt given a higher priority in

order to ensure that the interrupt is serviced in time.

A wide range of waveform generation configurations are possible using the various operating

modes of Timer 2 and the CCA. Some example configurations are detailed below. Pulse width

modulation is a special case of output compare. See Section 13.4 on page 76 for more details of

PWM operation.

TL2

TH2

CCxL

CCxH

CCCx

Interrupt

CCx (P2.x)

T2CCC

T2CCL

shadow

00H

CTCx

CCFx

CIENx

CxM2-0

T2CCH

AT89LP6440 Datasheet(PDF) 74 Page - ATMEL Corporation

AT89LP6440 Datasheet(HTML) 74 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL