AT89LP6440 datasheet(15/194 Pages) ATMEL

15 / 194 page

3706A–MICRO–9/09

AT89LP6440 - Preliminary

Figure 3-6.

FDATA Page Write

The auto-erase bit AERS (MEMCON.6) can be set to one to perform a page erase automatically

at the beginning of any write sequence. The page erase will erase the entire page, i.e. both the

low and high half pages. However, the write operation paired with the auto-erase can only pro-

gram one of the half pages. A second write cycle without auto-erase is required to update the

other half page.

Frequently just a few bytes within a page must be updated while maintaining the state of the

other bytes. There are two options for handling this situation that allow the Flash Data memory

to emulate a traditional EEPROM memory. The simplest method is to copy the entire page into a

buffer allocated in RAM, modify the desired byte locations in the RAM buffer, and then load and

write back first the low half page (with auto-erase) and then the high half page to the Flash mem-

ory. This option requires that at least one page size of RAM is available as a temporary buffer.

The second option is to store only one half page in RAM. The unmodified bytes of the other page

are loaded directly into the Flash memory’s temporary load buffer before loading the updated

values of the modified bytes. For example, if just the low half page needs modification, the user

must first store the high half page to RAM, followed by reading and loading the unaffected bytes

of the low half page into the page buffer. Then the modified bytes of the low half page are stored

to the page buffer before starting the auto-erase sequence. The stored value of the high half

page must be written without auto-erase after the programming of the low half page completes.

This method reduces the amount of RAM required; however, more software overhead is needed

because the read-and-load-back routine must skip those bytes in the page that need to be

updated in order to prevent those locations in the buffer from being loaded with the previous

data, as this will block the new data from being loaded correctly.

A write sequence will not occur if the Brown-out Detector is active, even if the BOD reset has

been disabled. In cases where the BOD reset is disabled, the user should check the BOD status

by reading the WRTINH bit in MEMCON. If a write currently in progress is interrupted by the

BOD due to a low voltage condition, the ERR flag will be set. FDATA can always be read regard-

less of the BOD state.

For more details on using the Flash Data Memory, see the application note titled “AT89LP Flash

Data Memory”. FDATA may also be programmed by an external device programmer (See Sec-

tion 25. on page 157).

MWEN

DMEN

LDPG

IDLE

MOVX

AT89LP6440 Datasheet(PDF) 15 Page - ATMEL Corporation