AT89LP6440 datasheet(6/194 Pages) ATMEL

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3706A–MICRO–9/09

AT89LP6440 - Preliminary

Overview

The AT89LP6440 is a low-power, high-performance CMOS 8-bit microcontroller with 64K bytes

of In-System Programmable Flash program memory and 8K bytes of Flash data memory. The

device is manufactured using Atmel

®'s high-density nonvolatile memory technology and is com-

patible with the industry-standard 8051 instruction set. The AT89LP6440 is built around an

enhanced CPU core that can fetch a single byte from memory every clock cycle. In the classic

8051 architecture, each fetch requires 6 clock cycles, forcing instructions to execute in 12, 24 or

48 clock cycles. In the AT89LP6440 CPU, standard instructions need only 1 to 4 clock cycles

providing 6 to 12 times more throughput than the standard 8051. Seventy percent of instructions

need only as many clock cycles as they have bytes to execute, and most of the remaining

instructions require only one additional clock. The enhanced CPU core is capable of 20 MIPS

throughput whereas the classic 8051 CPU can deliver only 4 MIPS at the same current con-

sumption. Conversely, at the same throughput as the classic 8051, the new CPU core runs at a

much lower speed and thereby greatly reducing power consumption and EMI.

The AT89LP6440 provides the following standard features: 64K bytes of In-System Programma-

ble Flash program memory, 8K bytes of Flash data memory, 4352 bytes of RAM, up to 38 I/O

lines, three 16-bit timer/counters, up to six PWM outputs, a programmable watchdog timer, two

analog comparators, a 10-bit ADC/DAC with 8 input channels, a full-duplex serial port, a serial

peripheral interface, a two-wire serial interface, an internal RC oscillator, on-chip crystal oscilla-

tor, and a four-level, twelve-vector interrupt system. A block diagram is shown in Figure 2-1.

P0.2

I/O

P0.2: User-configurable I/O Port 0 bit 2.

AD2: External memory interface Address/Data bit 2.

ADC2: ADC analog input 2.

P0.1

I/O

P0.1: User-configurable I/O Port 0 bit 1.

AD1: External memory interface Address/Data bit 1.

ADC1: ADC analog input 1.

P0.0

I/O

P0.0: User-configurable I/O Port 0 bit 0.

AD0: External memory interface Address/Data bit 0.

ADC0: ADC analog input 0.

AVDD

Analog Supply Voltage

VDD

Supply Voltage

P1.0

I/O

P1.0: User-configurable I/O Port 1 bit 0.

T2: Timer 2 External Input or Clock Output.

GPI0: General-purpose Interrupt input 0.

P1.1

I/O

P1.1: User-configurable I/O Port 1 bit 1.

T2EX: Timer 2 External Capture/Reload Input.

GPI1: General-purpose Interrupt input 1

P1.2

I/O

P1.2: User-configurable I/O Port 1 bit 2.

GPI2: General-purpose Interrupt input 2.

P1.3

I/O

P1.3: User-configurable I/O Port 1 bit 3.

GPI3: General-purpose Interrupt input 3.

P1.4

I/O

P1.4: User-configurable I/O Port 1 bit 4.

SS: SPI Slave-Select.

GPI6: General-purpose Interrupt input 4.

Table 1-1.

AT89LP6440 Pin Description

Pin Number

Symbol

Type

Description

TQFP

PLCC

PDIP

VQFN

AT89LP6440 Datasheet(PDF) 6 Page - ATMEL Corporation

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