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MSP430F5632IPZ Datasheet(PDF) 35 Page - Texas Instruments |
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MSP430F5632IPZ Datasheet(HTML) 35 Page - Texas Instruments |
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35 / 101 page  MSP430F563x www.ti.com SLAS650A – JUNE 2010 – REVISED JULY 2010 Table 40. DMA Registers (Base Address DMA General Control: 0500h, DMA Channel 0: 0510h, DMA Channel 1: 0520h, DMA Channel 2: 0530h, DMA Channel 3: 0540h, DMA Channel 4: 0550h, DMA Channel 5: 0560h) (continued) REGISTER DESCRIPTION REGISTER OFFSET DMA Channel 4 source address high DMA4SAH 04h DMA Channel 4 destination address low DMA4DAL 06h DMA Channel 4 destination address high DMA4DAH 08h DMA Channel 4 transfer size DMA4SZ 0Ah DMA Channel 5 control DMA5CTL 00h DMA Channel 5 source address low DMA5SAL 02h DMA Channel 5 source address high DMA5SAH 04h DMA Channel 5 destination address low DMA5DAL 06h DMA Channel 5 destination address high DMA5DAH 08h DMA Channel 5 transfer size DMA5SZ 0Ah Table 41. USCI_A0 Registers (Base Address: 05C0h) REGISTER DESCRIPTION REGISTER OFFSET USCI control 0 UCA0CTL0 00h USCI control 1 UCA0CTL1 01h USCI baud rate 0 UCA0BR0 06h USCI baud rate 1 UCA0BR1 07h USCI modulation control UCA0MCTL 08h USCI status UCA0STAT 0Ah USCI receive buffer UCA0RXBUF 0Ch USCI transmit buffer UCA0TXBUF 0Eh USCI LIN control UCA0ABCTL 10h USCI IrDA transmit control UCA0IRTCTL 12h USCI IrDA receive control UCA0IRRCTL 13h USCI interrupt enable UCA0IE 1Ch USCI interrupt flags UCA0IFG 1Dh USCI interrupt vector word UCA0IV 1Eh Table 42. USCI_B0 Registers (Base Address: 05E0h) REGISTER DESCRIPTION REGISTER OFFSET USCI synchronous control 0 UCB0CTL0 00h USCI synchronous control 1 UCB0CTL1 01h USCI synchronous bit rate 0 UCB0BR0 06h USCI synchronous bit rate 1 UCB0BR1 07h USCI I2C interrupt enable UCB0I2CIE 08h USCI synchronous status UCB0STAT 0Ah USCI synchronous receive buffer UCB0RXBUF 0Ch USCI synchronous transmit buffer UCB0TXBUF 0Eh USCI I2C own address UCB0I2COA 10h USCI I2C slave address UCB0I2CSA 12h USCI interrupt enable UCB0IE 1Ch USCI interrupt flags UCB0IFG 1Dh USCI interrupt vector word UCB0IV 1Eh Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 35 |
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