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MSP430F5632IPZ Datasheet(PDF) 82 Page - Texas Instruments |
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MSP430F5632IPZ Datasheet(HTML) 82 Page - Texas Instruments |
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82 / 101 page ![]() P7.3/XT2OUT P7SEL.3 1 0 P7DIR.3 P7IN.3 P7OUT.3 1 0 DV SS DV CC P7REN.3 PadLogic 1 P7DS.3 0:Lowdrive 1:Highdrive Bus Keeper ToXT2 MSP430F563x SLAS650A – JUNE 2010 – REVISED JULY 2010 www.ti.com Port P7, P7.3, Input/Output With Schmitt Trigger Table 57. Port P7 (P7.2 and P7.3) Pin Functions CONTROL BITS/SIGNALS(1) PIN NAME (P5.x) x FUNCTION P7DIR.x P7SEL.2 P7SEL.3 XT2BYPASS P7.2/XT2IN 2 P7.2 (I/O) I: 0; O: 1 0 X X XT2IN crystal mode(2) X 1 X 0 XT2IN bypass mode(2) X 1 X 1 P7.3/XT2OUT 3 P7.3 (I/O) I: 0; O: 1 0 X X XT2OUT crystal mode(3) X 1 X 0 P7.3 (I/O)(3) X 1 X 1 (1) X = Don't care (2) Setting P7SEL.2 causes the general-purpose I/O to be disabled. Pending the setting of XT2BYPASS, P7.2 is configured for crystal mode or bypass mode. (3) Setting P7SEL.2 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P7.3 can be used as general-purpose I/O. 82 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated |
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