C6416 datasheet(77/134 Pages) TI1

77 / 134 page

SMJ320C6414, SMJ320C6415, SMJ320C6416

FIXEDPOINT DIGITAL SIGNAL PROCESSORS

SGUS050A − JANUARY 2004 − REVISED MARCH 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

electrical characteristics over recommended ranges of supply voltage and operating case

temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

UNIT

VOH

High-level output voltage (except PCI)

DVDD = MIN,

IOH = MAX

2.4

VOHP

High-level output voltage (PCI)

[C6415/C6416 only]

IOHP = −0.5 mA,

DVDD = 3.3 V

0.9DVDD¶

VOL

Low-level output voltage (except PCI)

DVDD = MIN,

IOL = MAX

0.4

VOLP

Low-level output voltage (PCI)

[C6415/C6416 only]

IOLP = 1.5 mA,

DVDD = 3.3 V

0.1DVDD¶

VI = VSS to DVDD no opposing internal

resistor

±10

Input current (except PCI)

VI = VSS to DVDD opposing internal

pullup resistor‡

100

150

VI = VSS to DVDD opposing internal

pulldown resistor‡

−150

−100

−50

IIP

Input leakage current (PCI)

[C6415/C6416 only]§

0 < VIP < DVDD = 3.3 V

±10

EMIF, CLKOUT4, CLKOUT6, EMUx

−16

IOH

High-level output current

Timer, UTOPIA, TDO, GPIO (Excluding

GP[15:9, 2, 1]), McBSP

−8

PCI/HPI

−0.5¶

EMIF, CLKOUT4, CLKOUT6, EMUx

IOL

Low-level output current

Timer, UTOPIA, TDO, GPIO (Excluding

GP[15:9, 2, 1]), McBSP

PCI/HPI

1.5¶

IOZ

Off-state output current

VO = DVDD or 0 V

±10

ICDD

Core supply current#

CVDD = 1.4 V, CPU clock = 600 MHz

750

IDDD

I/O supply current#

DVDD = 3.3 V, CPU clock = 600 MHz

125

Input capacitance

Output capacitance

† For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.

‡ Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor.

§ PCI input leakage currents include Hi-Z output leakage for all bidirectional buffers with 3-state outputs.

¶ These rated numbers are from the PCI specification version 2.3. The DC specification and AC specification are defined in Tables 4-3 and 4-4,

respectively.

# Measured with average activity (50% high/50% low power). The actual current draw is highly application-dependent. For more details on core

and I/O activity, refer to the TMS320C6414/15/16 Power Consumption Summary application report (literature number SPRA811).

recommended clock and control signal transition behavior

All clocks and control signals must transition between VIH and VIL (or between VIL and VIH) in a monotonic

manner.

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