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W25Q128FVCIP Datasheet(PDF) 84 Page - Winbond |
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W25Q128FVCIP Datasheet(HTML) 84 Page - Winbond |
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84 / 97 page ![]() W25Q128FV - 83 - 9.6 AC Electrical Characteristics(6) DESCRIPTION SYMBOL ALT SPEC UNIT MIN TYP MAX Clock frequency for Read Data instruction (03h) fR D.C. 50 MHz Clock frequency for QPI Read instructions (0Bh, EBh, 0Ch), with different dummy clocks FR fC1 D.C. 33~104 MHz Clock frequency for all other SPI/QPI instructions 2.7V-3.6V VCC & Industrial Temperature FR fC1 D.C. 104 MHz Clock High, Low Time for all instructions except for Read Data (03h) tCLH, tCLL(1) 4 ns Clock High, Low Time for Read Data (03h) instruction tCRLH, tCRLL(1) 8 ns Clock Rise Time peak to peak tCLCH(2) 0.1 V/ns Clock Fall Time peak to peak tCHCL(2) 0.1 V/ns /CS Active Setup Time relative to CLK tSLCH tCSS 5 ns /CS Not Active Hold Time relative to CLK tCHSL 5 ns Data In Setup Time tDVCH tDSU 2 ns Data In Hold Time tCHDX tDH 3 ns /CS Active Hold Time relative to CLK tCHSH 3 ns /CS Not Active Setup Time relative to CLK tSHCH 3 ns /CS Deselect Time (for Array Read Array Read) tSHSL1 tCSH 10 ns /CS Deselect Time (for Erase or Program Read Status Registers) Volatile Status Register Write Time tSHSL2 tCSH 50 50 ns Output Disable Time tSHQZ(2) tDIS 7 ns Clock Low to Output Valid 2.7V-3.0V / 3.0V-3.6V tCLQV1 tV1 7 / 6 ns Clock Low to Output Valid (Non-array Read) 2.7V-3.0V / 3.0V-3.6V tCLQV2 tV2 8.5 / 7.5 ns Output Hold Time tCLQX tHO 2 ns /HOLD Active Setup Time relative to CLK tHLCH 5 ns Continued – next page |
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