HC705CT4GRSSLASHD datasheet(16/152 Pages) NXP

16 / 152 page

General Description

General Release Specification

MC68HC705CT4 — Rev. 2.0

General Description

MOTOROLA

1.2 Introduction

The MC68HC705CT4 is a 44-pin member of the M68HC05 Family that

supports the cordless telephone applications. The memory map

includes 5136 bytes of user EPROM, 240 bytes of boot ROM, and 256

bytes of RAM. The MCU has three 8-bit input/output (I/O) ports: A, B, C;

and one 7-bit I/O, port D. Port C has pullup options and keyscan

capability. The MC68HC705CT4 includes a bird core, a bird timer, a

synchronous serial I/O (SSI), 16-bit timer, a dual 60-MHz phase-lock

loop (PLL), and an on-chip computer operating properly (COP)

watchdog circuit.

Features of the MC68HC705CT4 include:

•

Low Cost

•

HC05 Core

•

44-Pin Plastic Leaded Chip Carrier (PLCC) Package

•

10.24-MHz On-Chip Crystal Oscillator

•

2.048-MHz Internal CPU Speed

•

5136 Bytes of User EPROM

•

240 Bytes of Boot ROM

•

256 Bytes of On-Chip RAM

•

16-Bit Timer

•

31 Bidirectional I/O Lines

•

Power-Saving Stop and Wait Modes

•

Core Timer

•

Dual 60-MHz PLL

•

Simple Serial with Bidirectional Data (SSI)

•

Keyscan Interrupt with Pullups on Port C

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705CT4GRS/D Datasheet(PDF) 16 Page - NXP Semiconductors

HC705CT4GRS/D Datasheet(HTML) 16 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL