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VNF9Q20F Datasheet(PDF) 44 Page - STMicroelectronics |
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VNF9Q20F Datasheet(HTML) 44 Page - STMicroelectronics |
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44 / 109 page  [7:2] Protected transaction mode: LOCKEN5: Lock enable for INOMx, TNOMx, and ILIM_LATCHx LOCKEN4: Lock enable for slope control SLOPECRx LOCKEN3: Lock enable for Bulb/LED mode CCRx LOCKEN2: Lock enable for phase shift CHPHAx LOCKEN1: Lock enable for configurable blanking time CHLOFFTCRx LOCKEN0: Lock enable for PWM clock synchronization When the bit is set (LOCKENx = 1), it is used to have a protected transaction: • Setting UNLOCK bit • Modify the relevant configuration register • LOCKENx = 0 means reset value - those configuration registers may be altered with a single frame standard Write command. [1] PWM clock synchronization. PWM SYNC = 1 to clear PWM internal counter. It automatically resets at next SPI communication [0] Parity bit VNF9Q20F SPI functional description DS13909 - Rev 6 page 44/109 |
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