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VNF9Q20F Datasheet(PDF) 70 Page - STMicroelectronics |
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VNF9Q20F Datasheet(HTML) 70 Page - STMicroelectronics |
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70 / 109 page ![]() 9 Safety-related functions Two built-in self-tests (BIST) have been implemented in VNF9Q20F to automatically check the ADC conversion and I²t comparators health along the device working life. The two BISTs are contemporarily executed, as soon as VCC is present (the device leaves the start phase). 9.1 ADC BIST At each power on reset, the digital part executes the ADC BIST. During the execution of that sequence, current sense reading is disabled and a multiplexer will pass a low reference current IBIST_MIN for combination <0, 0>, a medium reference current IBIST_MID for combination <0, 1> and a high reference current IBIST_MAX for combination <1, 0>. Table 44. ADC built in self-test adc_bist <1> adc_bist <0> IBIST Expected analog current 0 0 Low 50 µA 0 1 Mid 200 µA 1 0 High 550 µA 1 1 IVFRAME Dependent on frame temperature The ADC conversion results are stored into three distinct R&C registers: • Address 0x32h - Digital Current for self-test (Low Level) (ADCLSR) • Address 0x33h - Digital Current for self-test (Medium Level) (ADCMSR) • Address 0x34h - Digital Current for self-test (High Level) (ADCHSR) The microcontroller validates the expected conversions in the fail-safe state before activating the channels. During ADC BIST execution the channels are released and could be switched on, even if no output current sampling is executed through the ADC. A R&C command should be sent to these registers to check for any stuck bit. Configuration <1, 1> (default one) will end the BIST procedure by redirecting the multiplexer output current to the IVFRAME. It is kept until the next power on reset. Table 45. ADC BIST conversion results Symbol Parameter Test conditions Min. Typ. Max. Unit IBIST_Low IBIST low conversion result ADC BIST at POR; VCC =13 V; -12% 81 12% IBIST_Mid IBIST mid conversion result ADC BIST at POR; VCC =13 V; -10% 325 10% IBIST_High IBIST high conversion result ADC BIST at POR; VCC =13 V; -8% 890 8% ADC_bistexec ADC BIST execution time ADC BIST at POR; VCC =13 V; 100 μs I2t_bistexec I²t BIST execution time (channels off) 60 70 μs VNF9Q20F Safety-related functions DS13909 - Rev 6 page 70/109 |
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