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VNF9Q20F Datasheet(PDF) 43 Page - STMicroelectronics |
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VNF9Q20F Datasheet(HTML) 43 Page - STMicroelectronics |
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43 / 109 page ![]() CTRL Control register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R/W - R/W R - R/W W R Address: 0x14h Type: R/W Reset: 0 Description: Control register [15] Go to standby. It is necessary to perform 2 write accesses to enter standby: 1. Write UNLOCK = 1 2. Write GOSTBY = 1 and EN = 0 [14] Unlock bit. UNLOCK bit allows protected SPI transactions. It means that the next SPI communication will automatically clear this bit and prevent any change of protected data (like slope control or Bulb/Led mode for example). As a consequence, modifying a protected data requires to set UNLOCK bit in a first communication and write the protected data during the next communication. [13:12] - [11] Enter normal mode 1 - normal mode 0 - fail-safe mode To enter normal mode: • Write UNLOCK = 1 • Write EN = 1 Note: UNLOCK bit allows protected SPI transactions. Then, the next SPI communication will automatically clear this bit and prevent any change of protected data (like slope control or Bulb/Led mode for example). As a consequence, modifying a protected data requires to set UNLOCK bit in a first communication and write the protected data with the next communication. [10] PWM_TRIG: PWM triggering mode 0: PWM trigger according to the rising edge of PWM period and phase shift configuration 1: PWM trigger according to the falling edge of PWM period and phase shift configuration [9:8] - VNF9Q20F SPI functional description DS13909 - Rev 6 page 43/109 |
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