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VNF9Q20F Datasheet(PDF) 28 Page - STMicroelectronics |
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VNF9Q20F Datasheet(HTML) 28 Page - STMicroelectronics |
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28 / 109 page ![]() Address Name Access Content Access type Reset value 15h FSITCR0 Read/Write Fail-safe and I²t settings for channel 0 Init 0x0200 16h FSITCR1 Read/Write Fail-safe and I²t settings for channel 1 Init 0x0200 17h FSITCR2 Read/Write Fail-safe and I²t settings for channel 2 Init 0x0200 18h FSITCR3 Read/Write Fail-safe and I²t settings for channel 3 Init 0x0200 Not used area STATUS REGISTERS 20h OUTSR0 Read/Clear Output status register Channel 0 rare 0x0000 21h OUTSR1 Read/Clear Output status register Channel 1 rare 0x0000 22h OUTSR2 Read/Clear Output status register Channel 2 rare 0x0000 23h OUTSR1 Read/Clear Output status register Channel 3 rare 0x0000 Not used area 28h ADC0SR Read Digital current sense Channel 0 continuous 0x0000 29h ADC1SR Read Digital current sense Channel 1 continuous 0x0000 2Ah ADC2SR Read Digital current sense Channel 2 continuous 0x0000 2Bh ADC3SR Read Digital current sense channel 3 continuous 0x0000 Not used area 31h ADC9SR Read Digital frame temperature sense continuous 0x0000 32h ADCLSR Read/Clear Digital current for self-test (Low Level) Init 0x0000 33h ADCMSR Read/Clear Digital Current for self-test (Medium Level) Init 0x0000 34h ADCHSR Read/Clear Digital Current for self-test (High Level) Init 0x0000 35h ITCNTSR Read I²t counter status rare 0x0000 36h ITSTSR Read/Clear I²t self-test Init 0x0000 Not used area 3Dh TESTCFGR Read/Write Test configuration register rare 0x0000 3Eh TESTDATAR Read/Write Test data register rare 0x0000 Note: Any command (write, read, or read and clear status) executed on a “not used” RAM register, that is, a not assigned address, does not have any effect: there is no change in the global status byte (no communication error, no error flag). The data written to this address is ignored. The data read from this address contains 00, independently of what has been written previously to this address. A write command on “don’t care” bits of an assigned RAM register address does not have any effect: There is no change on the global status byte. The data written to the “don’t care bits” is ignored. The content of the “don’t care bits” remains at “0” independently of the data written to these bits. 4.3.3 ROM This memory is used for device identification. Table 26. ROM memory map Address Name Description Access Content 00h Company code STMicroelectronics company code Read only 00H 01h Device family Product family (STi²Fuse) code Read only 03H 02h Product code 1 First product letter code (X) Read only 58H 03h Product code 2 Second product letter code (V) Read only 56H 04h Product code 3 Third product letter code (1) Read only 1H VNF9Q20F SPI functional description DS13909 - Rev 6 page 28/109 |
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