TMP89FS60 datasheet(197/410 Pages) TOSHIBA

197 / 410 page

Page 183

TMP89FS60

RA002

14.4.3.3 Double buffer

The double buffer can be used for T00PWM by setting T00MOD<DBE0>. The double buffer is dis-

abled by setting T00MOD<DBE0> to "0" or enabled by setting T00MOD<DBE0> to "1".

• When the double buffer is enabled

When a write instruction is executed on T00PWM during the timer operation, the set value is

first stored in the double buffer, and T00PWM is not updated immediately. T00PWM compares

the previous set value with the up counter value. When the 2

× n-th overflow occurs, an

INTT00 interrupt request is generated and the double buffer set value is stored in T00PWM.

Subsequently, the match detection is executed using a new set value.

When a read instruction is executed on T00PWM, the value in the double buffer (the last set

value) is read out, not the T00PWM value (the currently effective value).

When a write instruction is executed on T00PWM while the timer is stopped, the set value is

immediately stored in both the double buffer and T00PWM.

• When the double buffer is disabled

When a write instruction is executed on T00PWM during the timer operation, the set value is

immediately stored in T00PWM. Subsequently, the match detection is executed using a new set

value. If the value set to T00PWM is smaller than the up counter value, the PWM0 pin is not

reversed until the up counter overflows and a match detection is executed using a new set

value. If the value set to T00PWM is equal to the up counter value, the match detection is exe-

cuted immediately after data is written into T00PWM. Therefore, the timing of changing the

PWM0

pin may not be an integral multiple of the source clock (Figure 14-7). Similarly, if

T00PWM is set during the additional pulse output, the timing of changing the PWM0 pin may

not be an integral multiple of the source clock. If these are problems, enable the double buffer.

When a write instruction is executed on T00PWM while the timer is stopped, the set value is

immediately stored in T00PWM.

Figure 14-7 Operation When T00PWM and the Up Counter Have the Same Value

Source clock

Counter

n-4

n-5

n-2

Write to T00PWM

Write n-2

PWM0 pin output

n-3

n-2

n-1

T00PWM

Match detection

T00MOD<DBE0>

TMP89FS60 Datasheet(PDF) 197 Page - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 197 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL