TMP89FS60 datasheet(199/410 Pages) TOSHIBA

199 / 410 page

Page 185

TMP89FS60

RA002

14.4.4 8-bit programmable pulse generate (PPG) output mode

In the 8-bit PPG mode, the pulses with arbitrary duty and cycle are output by using the T00REG and

T00PWM registers.

By setting the T001CR<OUTAND> register, a pulse that is a logical ANDed product of the TC00 and TC01

outputs can be output to the TC01 pin. This function facilitates the generation of remote-controlled waveforms,

for example.

The operation of TC00 is described below, and the same applies to the operation of TC01.

14.4.4.1 Setting

TC00 is put into the 8-bit PPG mode by setting T00MOD<TCM0> to "10" and T001CR<TCAS> to

"0". Set T00MOD<EIN0> to "0" and select the clock at T00MOD<TCK0>. Set the duty pulse width at

T00PWM and the cycle width at T00REG.

Set T00MOD<DBE0> to "1" to use the double buffer.

Setting T001CR<T00RUN> to "1" starts the operation. After the timer is started, writing to T00MOD

becomes invalid. Be sure to complete the required mode settings before starting the timer.

Figure 14-8 PPG0 Pulse Output

Set the initial state of the PPG0 pin at T00MOD<TFF0>. Setting T00MOD<TFF0> to "0" selects the

"L" level as the initial state of the PPG0 pin. Setting T00MOD<TFF0> to "1" selects the "H" level as the

initial state of the PPG0 pin. If the PPG0 pin is set as the function output pin in the port setting while the

timer is stopped, the value of T00MOD<TFF0> is output to the PPG0 pin. Table 14-8 shows the list of out-

put levels of the PPG0 pin.

Setting the T001CR<OUTAND> bit to "1" allows the PPG0 pin to output a pulse that is a logical

ANDed product of the TC00 and TC01 outputs.

Table 14-8 List of Output Levels of PPG0 Pin

TFF0

PPG0

pin output level

Before the start

of operation

(initial state)

T00PWM

matched

T00REG

matched

Operation

stopped

(initial state)

T00PWM

Timer start

(Duty pulse)

(1 cycle)

T00REG

PPG0 pin output

(TFF0=“0”)

PPG0 pin output

(TFF0=“1”)

Timer stop

T00PWM

T00REG

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