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TMP89FS60 Datasheet(PDF) 213 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 213 Page - Toshiba Semiconductor |
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213 / 410 page  Page 199 TMP89FS60 RA002 Table 14-12 Resolutions and Cycles in the 12-bit PWM Mode T01MOD <TCK1> Source clock [Hz] Resolution 8-bit cycle (period × 16) NORMAL1/2 or IDLE1/2 mode SLOW1/2 or SLEEP1 mode fcgck=8MHz fs=32.768KHz fcgck=8MHz fs=32.768KHz SYSCR1<DV9CK> = "0" SYSCR1<DV9CK> = "1" 000 fcgck/211 fs/24 fs/24 256 µs488.2µs 65.5ms (1048.6ms) 125ms (2000ms) 001 fcgck/210 fs/23 fs/23 128 µs244.1µs 32.8ms (524.3ms) 62.5ms (1000ms) 010 fcgck/28 fcgck/28 -32 µs- 8.2ms (131.1ms) - 011 fcgck/26 fcgck/26 -8 µs- 2.0ms (32.8ms) - 100 fcgck/24 fcgck/24 -2 µs- 512 µs (8192 µs) - 101 fcgck/22 fcgck/22 - 500ns - 128 µs (2048 µs) - 110 fcgck/2 fcgck/2 - 250ns - 64 µs (1024 µs) - 111 fcgck fcgck fs/22 125ns 122.1 µs 32 µs (512 µs) 31.3ms (500ms) |
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