LMK05028RGCT.B datasheet(10/94 Pages) TI2

10 / 94 page

Over Recommended Operating Conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

1.8-V LVCMOS Output Characteristics (OUTx)

fOUT

Output frequency(4)

1E-6

200

MHz

VOH

Output high voltage

IOH = 1 mA

1.2

VOL

Output low voltage

IOL = 1 mA

0.4

IOH

Output high current

-23

IOL

Output low current

tR/tF

Output rise/fall time(4)

20% to 80%

250

tSK

Output-to-output skew(4)

Same post divider, output divide values,

and output type

100

Same post divider, output divide values,

LVCMOS-to-DIFF

1.5

PNFLOOR

Output phase noise floor

(fOFFSET > 10 MHz)

66.66 MHz

-155

dBc/Hz

ODC

Output duty cycle(4) (13)

ROUT

Output impedance

2.5-V LVCMOS Output Characteristics (OUTx)

fOUT

Output frequency(4)

1E-6

200

MHz

VOH

Output high voltage

IOH = 1 mA

1.9

VOL

Output low voltage

IOL = 1 mA

0.525

IOH

Output high current

-48

IOL

Output low current

tR/tF

Output rise/fall time(4)

20% to 80%

250

tSK

Output-to-output skew(4)

Same post divider, output divide values,

and output type

100

Same post divider, output divide values,

LVCMOS-to-DIFF

1.5

PNFLOOR

Output phase noise floor

(fOFFSET > 10 MHz)

66.66 MHz

-155

dBc/Hz

ODC

Output duty cycle(4) (13)

ROUT

Output impedance

AC-LVDS Output Characteristics (OUTx)

fOUT

Output frequency(4) (6)

750

MHz

VOD

Output voltage swing (VOH - VOL) fOUT > 25 MHz

250

400

450

VODpp

Differential output voltage swing,

peak-to-peak

2×VOD

VOS

Output common mode

100

430

tSK

Output-to-output skew(4)

Same post divider, output divide values,

and output type

100

tR/tF

Output rise/fall time(4)

20% to 80%, < 300 MHz

225

350

± 100 mV around center point, ≥ 300

MHz

150

PNFLOOR

Output phase noise floor

(fOFFSET > 10 MHz)

156.25 MHz

-160

dBc/Hz

ODC

Output duty cycle(4) (13)

LMK05028

SNAS724B – FEBRUARY 2018 – REVISED FEBRUARY 2025

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