CP3SP33SMSSLASHNOPB datasheet(108/407 Pages) TI1

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CP3SP33

SNOSCW5 – MAY 2013

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WKFIEN

The Falling Edge Interrupt Enable bits enable an interrupt when a falling edge occurs on

the corresponding MIWU input.

0 – No interrupt enabled.

1 – Interrupt enabled.

17.1.8 Interrupt Control Register n (WKICTLn)

The WKICTLn registers are 32-bit, read/write registers that provide 2-bit fields which select the MIWU

interrupt channels used by the associated MIWU channels. Each MIWU input can only activate one of four

interrupt channels. MIWU inputs 31:0 can only activate MIWU interrupt channels 3:0, and MIWU inputs

63:32 can only activate MIWU interrupt channels 7:4.

The WKICTL1 register selects interrupts for MIWU inputs 15:0, WKICTL2 selects interrupts for MIWU

inputs 31:16, WKICTL3 selects interrupts for inputs 47:32, and WKICTL4 selects interrupts for inputs

63:48. At reset, the WKICTLn registers are cleared. The register format of WKICTL1 is shown below (the

other registers have a similar format).

15––--—14

13––--—12

11––--—10

9––--—8

7––--—6

5––--—4

3––--—2

1––--—0

WKIN

TR7

TR6

TR5

TR4

TR3

TR2

TR1

TR0

31––--—30

29––--—28

27––--—26

25––--—24

23––--—22

21––--—20

19––--—18

17––--—16

WKIN

TR15

TR14

TR13

TR12

TR11

TR10

TR9

TR8

WKINTR

The Interrupt Request fields select which of four available MIWU interrupt channels are

activated for the corresponding MIWU input.

00 – Selects MIWU interrupt channel 0 or 4.

01 – Selects MIWU interrupt channel 1 or 5.

10 – Selects MIWU interrupt channel 2 or 6.

11 – Selects MIWU interrupt channel 3 or 7.

17.1.9 Interrupt Status Register (WKISTAT)

The WKISTAT register is a 32-bit read-only register that indicates the status of the 8 MIWU interrupt

channels. No interrupt channels are active following reset. The register format is shown below.

8M M7

Reserved

WKIST

The Interrupt Status bits indicate which MIWU interrupt channels are currently asserting an

interrupt request.

0 – No interrupt request is being asserted.

1 – An interrupt request is being asserted.

108

Multi-Input Wake-Up

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