CP3SP33SMSSLASHNOPB datasheet(113/407 Pages) TI1

113 / 407 page

CP3SP33

www.ti.com

SNOSCW5 – MAY 2013

PxDOUT

PxDOUT The Port Data Out bits hold the data to be driven on pins configured as outputs in general-

purpose I/O mode. When interrupts are enabled in the PxIEN register, the PxDOUT bits

specify the signal levels which assert interrupts.

0 – Drive output pin low.

1 – Drive output pin high.

18.2.4 Port Interrupt Enable Register (PxIEN)

The PxIEN registers enable the port input logic so that the corresponding pins can be used as wake-up

inputs to the MIWU. All 16 pins on Ports E, F, and G and three pins on 8-bit Port H have independently

programmable MIWU channels, which give them the capability to interrupt the CPU and wake up the

system from low-power modes. If an alternate function is enabled which uses a pin as an input, the port

input logic is already enabled, so it is not required to set the corresponding bit in its PxIEN register. The

PxDOUT register specifies the signal level which asserts the wake-up signal to the MIWU. At reset, the

PxIEN

The Port Interrupt Enable bits enable the port input logic so that the corresponding port pins

can be used as MIWU inputs.

0 – Interrupt disabled.

1 – Interrupt enabled.

18.2.5 Port Alternate Function Register (PxALT)

The PxALT registers control whether the port pins are used for general-purpose I/O or for their alternate

function. Each port pin can be controlled independently.

A clear bit in the alternate function register causes the corresponding pin to be used for general-purpose

I/O. In this configuration, the port pin output buffer is controlled by the direction register (PxDIR) and the

data output register (PxDOUT). The input buffer is visible to software as the data input register (PxDIN).

A set bit in the alternate function register (PxALT) causes the corresponding pin to be used for its

peripheral I/O function. When the alternate function is selected, the port direction and output data are

controlled by the peripheral device.

A reset clears the port alternate function registers, which initializes the pins as general-purpose I/O ports.

PxALT

The Port Alternate Function bits control whether the corresponding port pins are general-

purpose I/O ports or are used in their alternate function by an on-chip peripheral.

0 – General-purpose I/O selected.

1 – Alternate function selected.

Input/Output Ports

113

Submit Documentation Feedback

Product Folder Links :CP3SP33

CP3SP33SMS/NOPB Datasheet(PDF) 113 Page - Texas Instruments