CP3SP33SMSSLASHNOPB datasheet(124/407 Pages) TI1

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CLKIN

RESET

DS334

SDAT

SCLK

B3k2

BPOR

RFCE

RFDATA

SLE

Idle

DS324

Crystal Osc. Stable

RF Init

RFCE = High

RFDATA = Don't Care

Write Registers

RESET# = High and

Power is On

Power-Up

Wait for

Crystal Osc.

To Stabilize

RESET# = Low or

Power is cycled

Off

RFCE = High

Wait XTL

Wait for

Crystal Osc.

To Stabilize

RFCE = Low

Sleep

Any State

After RF Init

Crystal Osc. Stable

CP3SP33

SNOSCW5 – MAY 2013

www.ti.com

Figure 19-10. LMX5252 Power States

The power-up sequence for a Bluetooth system based on the CP3SP33 and LMX5252 devices is shown

in Figure 19-11.

Figure 19-11. LMX5252 Power-Up Sequence

19.5 Bluetooth Sleep Mode

The Bluetooth controller is capable of putting itself into a sleep mode for a specified number of Slow Clock

cycles. In this mode, the controller clocks are stopped internally. The only circuitry which remains active

are two counters (counter N and counter M) running at the Slow Clock rate. These counters determine the

duration of the sleep mode.

The sequence of events when entering the LLC sleep mode is as follows:

1. The current Bluetooth counter contents are read by the CPU.

2. Software “estimates” the Bluetooth counter value after leaving the sleep mode

3. The new Bluetooth counter value is written into the Bluetooth counter register.

124

Bluetooth Controller

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