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ATPL00B Datasheet(PDF) 82 Page - ATMEL Corporation

Part # ATPL00B
Description  FSK Power Line Communications SoC
PDF  152 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATPL00B Datasheet(HTML) 82 Page - ATMEL Corporation

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Atmel ATPL00B [datasheet]
43028A-ATPL - 9/12
82
9.1.3
OUT_ST register
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
B it 0
OUT_ST
--
--
--
--
D3
D2
D1
D0
Name:
OUT_ST
Address:
0XFEA2
Reset:
“00000000”
This register selects which loads are switched on. If PWM mode is selected, then this register is used to indicate which
PWM outputs are active.
D3:
This bit sets the state of the load connected to TRIAC3 output
„0‟: The load connected to TRIAC3 output is OFF
„1‟: The load connected to TRIAC3 output is ON
D2:
This bit sets the state of the load connected to TRIAC2 output
„0‟: The load connected to TRIAC2 output is OFF
„1‟: The load connected to TRIAC2 output is ON
D1:
This bit sets the state of the load connected to TRIAC1 output
„0‟: The load connected to TRIAC1 output is OFF
„1‟: The load connected to TRIAC1 output is ON
D0:
This bit sets the state of the load connected to TRIAC0 output
„0‟: The load connected to TRIAC0 output is OFF
„1‟: The load connected to TRIAC0 output is ON



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