ATPL00B datasheet(25/152 Pages) ATMEL

25 / 152 page

Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

4.3.3

Data Memory

Figure 4-8 shows the internal and external Logical Data Memory spaces available to the microcontroller user.

Figure 4-8.

Data Memory Space

Logical addressing of the Internal Data Memory is mapped as shown in Figure 4-8

. The internal IDATA memory space

has a total size of 384 bytes and is divided into three blocks, which are generally referred to as the Lower 128 bytes, the

Upper 128 bytes and SFR space (128 bytes size).

Internal Data Memory addresses are always one byte wide, which implies an address space of only 256 bytes. A simple

trick is used to accommodate the 384 bytes of IDATA using 8 bit addresses: direct addresses higher than 7FH access

SFR memory space, whereas indirect addresses higher than 7FH access the Upper 128 bytes of IDATA. Thus, Figure

4-8 shows the Upper 128 bytes and SFR space occupying the same block of addresses, 80H through FFH, although

they are physically separate entities.

...

ACC

...

Port 3

...

Port 2

Port 1

...

Port 0

indirect

IDATA

direct

IDATA

SFRs

direct &

indirect

IDATA

0x80

0xE0

0xB0

0xA0

0x90

0xFF

0x80

0x7F

0x2F

0x20

0x1F

0x18

0x17

0x10

0x0F

0x08

0x07

0x00

4 Banks of 8

Registers R0

– R7

Bit

– Addressable Space

(Bit Addresses 0

– 7F)

Bank

Select

Bits in

PSW

0x7F

0x00

0xFF

0x80

Special

Function

Registers

RESET STACK POINTER

Ports

PSW

Timer

Registers

Stack Pointer

Accumulator

Control Bits

(Etc)

(Addresses that end in 0 or 8

are also bit-addressable.)

Upper

128

Lower

128

No Bit

–Addressable

Spaces

External

Program

Memory

External

Data

Memory

(XDATA)

IDATA

PROGRAM

DATA

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