ATPL00B datasheet(54/152 Pages) ATMEL

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Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

Up Counter Operation

When DCEN = 0, timer 2 operates as an up counter.

The external enable bit EXEN2 in the T2CON register provides two options. If EXEN2 = 0, timer 2 counts up to

FFFFH and sets the TF2 overflow flag. The overflow condition loads the 16-bit value in the reload/capture

registers (RCAP2H, RCAP2L) into the timer registers (TH2, TL2). The values in RCAP2H and RCAP2L are

preset by software.

If EXEN2 = 1, the timer registers are reloaded by either a timer overflow or a high-to-low transition at external

input T2EX. This transition also sets the EXF2 bit in the T2CON register.

Either TF2 or EXF2 bit can generate a timer 2 interrupt request.

Up/Down Counter Operation

When DCEN = 1, timer 2 operates as an up/down counter.

External pin T2EX controls the direction of the count.

When T2EX is high, timer 2 counts up. The timer overflow occurs at FFFFH which sets the timer 2 overflow flag

(TF2) and generates an interrupt request. The overflow also causes the 16-bit value in RCAP2H and RCAP2L to

be loaded into the timer registers TH2 and TL2.

When T2EX is low, timer 2 counts down. Timer underflow occurs when the count in the timer registers (TH2, TL2)

equals the value stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and reloads FFFFH into the

timer registers.

The EXF2 bit toggles when timer 2 overflows or underflows changing the direction of the count. When timer 2

operates as an up/down counter, EXF2 does not generate an interrupt. This bit can be used to provide 17-bit

resolution.

Table 5-2.

Timer 2 Auto-reload mode

5.2.4

Clock-Out mode

In the clock-out mode, timer 2 operates as a 50%-duty-cycle, variable-frequency clock. The input clock increments TL2

at frequency FOSC/2 (where FOSC=11.059.200Hz). The timer repeatedly counts to overflow from a preloaded value. At

overflow, the contents of the RCAP2H and RCAP2L registers are loaded into TH2/TL2. In this mode, timer 2 overflows

do not generate interrupts. The formula gives the clock-out frequency as a function of the system oscillator frequency

and the value in the RCAP2H and RCAP2L registers:

TH2

RCAP

CLK

1/(3 x (T2PR(1:0) + 1))

TL2

TF2

„1‟

„0‟

T2 pin

TR2

C/T2

Interrupt

Control

Hardware

RCAP

EXF2

T2EX pin

EXEN 2

(down counting reload value)

(up counting reload value)

ATPL00B Datasheet(PDF) 54 Page - ATMEL Corporation

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