ATPL00B datasheet(36/152 Pages) ATMEL

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Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

The AJMP instruction encodes the destination address as an 11-bit constant. The instruction is 2 bytes long, consisting

of the opcode, which itself contains 3 of the 11 address bits, followed by another byte containing the low 8 bits of the

destination address. When the instruction is executed, these 11 bits replace the low 11 bits in the PC. The high 5 bits

stay the same. Hence the destination has to be within the same 2k block as the instruction following the AJMP.

The JMP @A+DPTR instruction supports case jumps. The destination address is computed at execution time as the

sum of the 16-bit DPTR register and the Accumulator. Typically, DPTR is set up with the address of a jump table.

Table 4-9

shows two “CALL addr” instructions LCALL and ACALL, which differ in the format in which the subroutine

address is given to the CPU. CALL is a generic mnemonic which can be used if the programmer does not care which

way the address is encoded.

The LCALL instruction uses the 16-bit address format, and the subroutine can be anywhere in the 64k Program Memory

space.

The ACALL instruction uses the 11-bit format, and the subroutine must be in the same 2k block as the instruction

following the ACALL.

Subroutines should end with a RET instruction, which returns execution to the instruction following the CALL.

RETI is used to return from an interrupt service routine. The only difference between RET and RETI is that RETI tells

the interrupt control system that the interrupt in progress is done. If there is no interrupt in progress at the time RETI is

executed, then the RETI is functionally identical to RET.

Table 4-10 shows the list of conditional jumps available to the microcontroller user. All of these jumps specify the

destination address by the relative offset method, and so are limited to a jump distance of

–128 to +127 bytes from the

instruction following the conditional jump instruction.

There is no Zero bit in the PSW. The JZ and JNZ instructions test the Accumulator data for that condition.

The DJNZ instruction (Decrement and Jump if Not Zero) is for loop control.

The CJNE instruction (Compare and Jump if Not Equal) can also be used for loop control. Two bytes are specified in

the operand field of the instruction. The jump is executed only if the two bytes are not equal. Another application of this

instruction is in “greater than, less than” comparisons. The two bytes in the operand field are taken as unsigned

integers. If the first is less than the second, then the Carry bit is set (1). If the first is greater than or equal to the second,

then the Carry bit is cleared.

Table 4-9.

Unconditional Jump instructions

MNEMONIC

OPERATION

EXECUTION TIME (mc)

(S)JMP addr

Jump to addr

(L)JMP addr

Jump to addr

(A)JMP addr

Jump to addr

JMP @A+DPTR

Jump to A + DPTR

(A,L)CALL addr

Call subroutine at addr

RET

Return from subroutine

RETI

Return from interrupt

NOP

No operation

ATPL00B Datasheet(PDF) 36 Page - ATMEL Corporation

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